Temperature variation-based dynamic time sequence adjustment method and device and network equipment

Abstract

The invention discloses a temperature variation-based dynamic time sequence adjustment method and a temperature variation-based dynamic time sequence adjustment device. The method comprises the following steps of: A, starting time sequence adjustment aiming at a synchronous interface, acquiring a current optimal time sequence, and recording a temperature interval corresponding to the current optimal time sequence, wherein the temperature interval is determined according to a working temperature range of the synchronous interface; B, polling environment temperature according to a set time period and determining the temperature interval corresponding to the polled environment temperature; and C, judging whether the temperature interval corresponding to the current optimal time sequence and the temperature interval corresponding to the polled environment temperature are intersected, executing the step B if the two temperature intervals are intersected, and otherwise, executing the step A. The scheme can guarantee that network equipment applying the synchronous interface does not go wrong due to environment temperature variation, so that the stability of the network equipment is improved; and the universality is high, the difference of the synchronous interface is not required to be considered, and the network equipment is suitable for all synchronous interfaces.

Description

Technical field [0001] The invention relates to the field of computer technology, in particular to a method, device and network equipment for dynamically adjusting the timing of a synchronization interface based on temperature changes. Background technique [0002] For the synchronization interface, the signal setup time (Set Up Time, Tsu) and hold time (HoldTime, Th) are two important parameters. Tsu refers to the time required for the data to change from unstable to stable before the clock edge arrives. If Tsu does not meet the requirements, the data will not be stably driven into the flip-flop at this clock edge; Th refers to the time that the data remains stable after it is stable If Th does not meet the requirements, the data cannot be stably entered into the trigger. The relationship between Tsu and Th is as figure 1 As shown, the length of time between 80% of the rising edge of the data signal and 80% of the rising edge of the clock signal is Tsu, and the length of time b...

AI Technical Summary

Problems solved by technology

However, from the perspective of the development of DDR, the operating frequency of high-speed synchronous interfaces is getting higher and higher, and the timing margin is getting smaller and smaller. Tsu and Th have reached the ps level, so the impact of temperature changes on timing cannot be ignored.

However, the timing of the existing high-speed synchronous interface is preset and cannot be changed. When the working environment temperature of the network equipment using the high-speed synchronous int...

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