Multi-layer scavenging metal gate stack for ultra-thin interfacial dielctric layer

Abstract

A multi-layer scavenging metal gate stack, and methods of manufacturing the same, are disclosed. In an example, a gate stack disposed over a semiconductor substrate includes an interfacial dielectric layer disposed over the semiconductor substrate, a high-k dielectric layer disposed over the interfacial dielectric layer, a first conductive layer disposed over the high-k dielectric layer, and a second conductive layer disposed over the first conductive layer. The first conductive layer includes a first metal layer disposed over the high-k dielectric layer, a second metal layer disposed over the first metal layer, and a third metal layer disposed over the second metal layer. The first metal layer includes a material that scavenges oxygen impurities from the interfacial dielectric layer, and the second metal layer includes a material that adsorbs oxygen impurities from the third metal layer and prevents oxygen impurities from diffusing into the first metal layer. The invention provides a multi-layer scavenging metal gate stack for an ultra-thin interfacial dielctric layer.

Description

technical field [0001] The present invention relates to the field of semiconductors, and more particularly, the present invention relates to multilayer clear metal gate stacks. Background technique [0002] The semiconductor integrated circuit (IC) industry has experienced rapid development. Technological developments in IC materials and design have produced multiple generations of ICs, each new generation having smaller but more complex circuits than the previous generation. These developments have increased the complexity of IC handling and fabrication, and similar developments in IC handling and fabrication are required in order for these developments to be realized. During the evolution of ICs, functional density (ie, the number of interconnected devices per chip area) has typically increased while geometry size (ie, the smallest component (or line) that can be produced using a fabrication process) has decreased. The advantages of this scaled-down process are increased...

AI Technical Summary

Problems solved by technology

Thus, while high-k / metal gate stacks exist and methods of fabricating such high-k / metal gate stacks have generally served their intended purpose, as device scaling continues, this High / k metal gate stacks and their fabrication methods still do not fully address all aspects

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