Press fit method for to-be-pressed multi-layer plate with chip window

Abstract

An embodiment of the invention provides a press fit method for a to-be-pressed multi-layer plate with a chip window. The press fit method comprises providing the to-be-pressed multi-layer plate, a hard lining plate, two heat conducting pressure transmitting plates and a soft lining plate, enabling the to-be-pressed multi-layer plate to comprise a plurality of single-layer plates formed by stacking, and enabling the chip window to be formed in the to-be-pressed multi-layer plate; arranging stuffing in the chip window, and enabling the shape and the dimensions of the stuffing to correspond to the dimensions of the chip window; enabling the soft lining plate, the to-be-pressed multi-layer plate, the hard lining plate and one heat conducting pressure transmitting plate to be sequentially placed on the other heat conducting pressure transmitting plate, and enabling the stuffing to be located in the chip window; enabling the heat conducting pressure transmitting plates and the to-be-pressed multi-layer plate to be pressed into an integrated multi-layer plate; and removing the heat conducting pressure transmitting plate, the soft lining plate and the stuffing above the integrated multi-layer plate and the hard lining plate and the heat conducting pressure transmitting plate below the integrated multi-layer plate. The press fit method solves the problem that the multi-layer plate with the chip window cannot be stressed evenly during press fit.

Description

technical field [0001] The invention relates to the field of manufacturing PCB substrates, in particular to a pressing method for a multilayer board to be pressed with a chip window. Background technique [0002] The PCB substrate is usually a multi-layer board. In the existing multi-layer boards, the single-layer boards are usually made first, and then the single-layer boards are stacked, and the single-layer boards are pressed into a multi-layer board by pressing. Specifically, please refer to figure 1 , is a schematic diagram of the lamination principle of the existing multi-layer board. The laminated multi-layer board 17 includes a plurality of stacked single-layer boards, each single-layer board includes a prepreg, and at least one side of the prepreg is formed with a wiring layer, which are: the first prepreg 11, the material is a prepreg, and the A first wiring layer 111 is formed on the first prepreg 11 (the first prepreg 11 and the first wiring layer 111 form a fi...

AI Technical Summary

Problems solved by technology

[0005] In practice, it is found that the above method cannot effectively bond multilayer boards with chip windows, and cannot meet the requirements of the application.

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