Serial Peripheral Interface (SPI) controller and communication method

Abstract

The invention relates to a Serial Peripheral Interface (SPI) controller. The controller comprises an inner bus interface module, a register module, a data converting module, a state and breaking control module, a data transmitting and receiving buffer and a state limiting machine which is used for generating output of Slave Select (SS) and SPI Clock (SCLK) in accordance with SPI transmitting parameters for controlling the storage of the register and SCLK Baud rate parameters for controlling the storage of a Baud rate register in the register module. For the modified SPI controller, the SS output is controlled by SPI controller hardware automatically when the controller is a host computer, and the software is not required to simulate the SS output, when the reading of the data in the buffer is selected, the unnecessary operation that a Central Processing Unit (CPU) reads and receives the data buffer is reduced, the required software control is reduced greatly when the CPU operates the SPI controller, and the use rate of the CPU is improved.

Description

【Technical field】 [0001] The invention relates to serial communication technology, in particular to an improved SPI controller and a communication method based on the SPI controller. 【Background technique】 [0002] SPI (Serial Peripheral Interface, Serial Peripheral Interface) is a full-duplex, synchronous serial transmission bus first proposed by Motorola. It is mainly used for communication between microcontrollers and peripheral devices, as well as for microprocessors. communication with the microprocessor. It has the advantages of simple circuit structure, fast transmission speed and reliable communication. [0003] The SPI bus includes 4 signal lines: SS (Slave Select, slave select), SCLK (SPI Clock, SPI transmission clock), MOSI (Master Output Slave Input, master output slave input) and MISO (Master Input Slave Output, master) input slave output). Among them, SS is output by the SPI master, which is used by the SPI master to select the SPI slave, and the low level i...

AI Technical Summary

Problems solved by technology

[0023] Therefore, regardless of whether the SPI controller is configured as a master or a slave, after the receiving data buffer is full of data, regardless of whether the received data is actually used, the data in the receiving data buffer must be read in time, otherwise the next The data cannot be written into the receiving data buffer, which greatly increases the software overhead and the occupation of CPU resources. At the same time, it increases the burden on software designers.

Images