Method and device of clock synchronization

Abstract

The invention discloses a method and a device of clock synchronization. The method comprises that slave clocks are among a plurality of main clocks, and a main clock with the quality being superior to the clocks is confirmed among a plurality of main clocks; according to the priority of transmission links of the clock, a main clock with the highest priority among the confirmed main clocks is chosen to be used as a mainly-used main clock, wherein a plurality of clock transmission links respectively correspond to the plurality of main clocks, and the transmission links are used for clock transmission among the plurality of main clocks. The mainly-used main clock is used for the clock synchronization. Through the above method, the fact that all slave clocks use the same main clock for the clock synchronization is avoided, the load of the main clock is lowered, and the entire performance of the system is improved.

Description

technical field [0001] The present invention relates to the communication field, in particular to a clock synchronization method and device. Background technique [0002] The IP-based evolution of wireless networks has put forward higher requirements for network clock synchronization of data communication network equipment. In order to meet the requirements of IP radio access network (Radio Access Network, RAN for short), frequencies between different base stations must be synchronized within a certain accuracy, otherwise, call drops will occur when the mobile phone performs base station switching. However, some wireless standards, in addition to frequency, especially require phase synchronization, that is, time synchronization. [0003] The base station's requirements for clock synchronization and time synchronization can be met by various means, including: physical clock (such as external clock input, synchronous Ethernet, etc.), packet recovery clock (such as 1588v2, etc...

AI Technical Summary

Problems solved by technology

However, there are two defects: first, the BMC algorithm can only select the best master clock according to the quality of the master clock itself, and cannot detect the transmission link status between the master and the slave clock SLAVE; secondly, when the BMC algorithm selects the best master clock Within a period of time, all SLAVEs can only synchronize with the same MASTER, which cannot achieve real load sharing

[0006] All slave clocks in the related art adopt the same master clock selection logic, and the selected master clocks are the same, so that all slave clocks can only use the selected master clock for clock synchronization, which in turn causes the selected master clock The load of the problem is very large, and no effective solution has been proposed so far

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