Memory control device and memory control method
A technology of a control device and a control method, which can be applied in the fields of protecting storage content to prevent loss, error detection of instruments and redundant codes, etc., and can solve the problems of data retention time leakage and the like
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[0016] figure 1 It is a configuration diagram of the memory control device according to the embodiment of the present invention, and is a diagram for explaining the operation when the CPU 1 starts up. also, figure 2 It is a configuration diagram of the memory control device according to the embodiment of the present invention, and is a diagram for explaining the operation when the flash ROM 4 is written or erased.
[0017] In the following description, the configuration of the memory control device will be described first, and then the operation when the CPU 1 starts up and the operation when writing data in the flash ROM 4 is performed will be described.
[0018] exist figure 1 and figure 2 In the memory control device of this embodiment, its main structure includes CPU1, flash ROM4 (hereinafter referred to simply as "ROM4"), and an address line switcher 5 between the address bus 2 of CPU1 and ROM4 (first switching device), decoder 7, and data line switcher 6 (second sw...
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