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Redundant fault-tolerant built-in self-repairing method suitable for static stage random access memory

A built-in self-repair, redundant fault-tolerant technology, applied in the field of redundant fault-tolerant built-in self-repair, can solve problems such as failure to repair correctly

Inactive Publication Date: 2013-05-01
XI AN UNIIC SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The method of the present invention improves the traditional built-in self-repair algorithm by adding a redundant test module and a failed redundant address shielding module, which solves the defect that the traditional built-in self-repair algorithm cannot be correctly repaired when the redundant address fails

Method used

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  • Redundant fault-tolerant built-in self-repairing method suitable for static stage random access memory
  • Redundant fault-tolerant built-in self-repairing method suitable for static stage random access memory
  • Redundant fault-tolerant built-in self-repairing method suitable for static stage random access memory

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Embodiment Construction

[0023] Embodiments of the present invention will be further described below in conjunction with the accompanying drawings.

[0024] see figure 1 as shown, figure 1 An example of a redundant fault-tolerant built-in self-healing method implemented according to the present invention. The inventive method comprises the following steps:

[0025] 1) First, perform a reset operation to initialize all registers in the SRAM built-in self-repair algorithm;

[0026] 2) Then, enter the redundancy test, the redundancy test module executes the March C-algorithm on the SRAM redundancy address. In the redundancy test, the redundant address failure flag bit is obtained.

[0027] 3) Then, enter the failed redundant address masking, the failed redundant address masking module shields the failed redundant address by analyzing the failed flag bit of the redundant address, and stores the valid redundant address.

[0028] 4) Then, enter the main test, the main test module executes the March C-a...

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Abstract

The invention provides a redundant fault-tolerant built-in self-repairing method suitable for static stage random access memory, the method provides an improvement to traditional built-in self-repairing arithmetic, a redundant test module and a lapse redundant address screening module are added, and the defect that in the traditional built-in self-repairing arithmetic, when the redundant address lapses, the reparation cannot be rightly performed is solved. Firstly, redundant test module tests the redundant address, if the tested redundant address is invalid, the invalidation flag bit is 1 and the acquiescence is 0. When the redundant test finishes; and every redundant address gets the invalidation flag bit. At the moment, an invalid redundant address screening module works and analyzes the redundant addresses; if the redundant address invalidation flag bit is 0, the redundant address is write in an effective redundant address register, otherwise, the redundant address is screened and not to be written. Through the screening of the invalid redundant addresses, all replaced redundant addresses are guaranteed to be valid when the self-repairing addresses are replaced.

Description

【Technical field】 [0001] The invention relates to the field of built-in self-repair algorithms of memory, in particular to a redundant fault-tolerant built-in self-repair method suitable for static random access memory. 【Background technique】 [0002] Embedded Static Random Access Memory (SRAM) is widely used in SOCs due to its high-speed performance. According to the forecast of the International Semiconductor Technology Roadmap (ITRS), the proportion of embedded SRAM in the SOC system will continue to increase, and will increase to 94% by 2014. [0003] Due to process defects and other reasons, the yield rate of SRAM is reduced. SRAM built-in self-repair (BISR) is an effective repair method. The self-repair function of BISR is realized by using a part of the main address of SRAM as a redundant address. When the main address fails, BISR uses the redundant address to replace the failed address. The traditional BI SR directly tests the main address. If the main address fai...

Claims

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Application Information

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IPC IPC(8): G11C29/44
Inventor 熊保玉拜福君
Owner XI AN UNIIC SEMICON CO LTD
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