2T dynamic memory unit and array structure based on resistance variation gate dielectric and method for operating same

Abstract

The invention belongs to the technical field of memories and relates to a 2T dynamic memory unit and array structure based on a resistance-change gate dielectric and a method for operating the same. The 2T dynamic memory unit and array structure comprises a write-in tube, a read tube, a memory part, a write word line, a write bit line, a read word line and a read bit line, wherein the source terminal of the write-in tube is connected with the gate electrode of the read tube; the write-in tube has a programming function; the gate dielectric of the read tube is the memory part; the gate dielectric has an insulation state, a high-resistance state and a low-resistance state, and the conversion between high resistance and low resistance is reversible; a certain voltage is applied to the gate electrode of the read tube and the read word line in a reading process; and '0'and '1' can be judged according to the voltage change or the current value of the read bit line. The 2T dynamic memory unit and array structure is simple and convenient in process, low in cost, superior in effect, low in power consumption and high in performance, and is compatible with the front end of a 32-nm High k CMOS logic process.

Description

technical field [0001] The invention belongs to the technical field of memory, and relates to a 2T device and an array structure for an embedded dynamic memory, in particular to a 2T dynamic memory unit and an array structure based on a resistive variable gate medium and an operation method thereof. Background technique [0002] A storage unit of a traditional DRAM typically includes two components: a storage capacitor and an access transistor, forming a 1T1C structure. Such as figure 1 In the traditional DRAM array structure shown, 100 to 108 are access transistors, 109 to 111 are bit lines, 112 to 114 are word lines, 115 to 117 are parasitic capacitances on bit lines, and 118 to 126 are storage capacitor. Generally, the working process of a traditional DRAM includes, the following takes the operation of the memory cell formed by the access transistor 100 and the storage capacitor 118 as an example: in the write operation phase, the data value is placed on the bit line 10...

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Problems solved by technology

This kind of 1T1C structure DRAM relies on storage capacitors to store data, so the storage capacitors must be large enough to ensure the reliability of storage, but the existence of large capacitors not only occupies an a

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