Bus interface patch board and data transmission system

A technology of bus interface and adapter board, which is applied in the field of data transmission system based on bus interface, can solve the problems of low test efficiency and stability, and achieve the effects of improving efficiency, ensuring stability and accuracy, and being convenient to use

Inactive Publication Date: 2013-06-12
이노피데이인코포레이티드 +1
View PDF7 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The invention provides a bus interface adapter board to solve the problem of low test efficiency and stability caused by temporary wiring before testing in the prior art to connect the bus interface and USB devices

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Bus interface patch board and data transmission system
  • Bus interface patch board and data transmission system
  • Bus interface patch board and data transmission system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0034] refer to figure 1 , a structural diagram of a bus interface adapter board described in Embodiment 1 of the present invention is given.

[0035] Wherein, the bus interface adapter board 1 includes a bus interface connector J1 and a USB interface J2.

[0036] In this embodiment, the bus interface is an interface of the PCI-E bus, and the bus interface connector J1 in the bus interface adapter board 1 can adopt various devices of the PCI-E bus.

[0037] Wherein, the bus interface connector J1 includes n connecting wires, and one end of the n connecting wires is respectively used to connect to the corresponding n pins in the bus interface, where n is a positive integer;

[0038] The USB interface J2 includes m data lines, and one end of the m data lines is respectively used to connect to corresponding m data lines in a general-purpose USB device, wherein m is a positive integer.

[0039] The other end of the m data lines in the USB interface J2 is respectively connected t...

Embodiment 2

[0054] refer to figure 2 , which provides a structural diagram of the bus interface adapter board described in Embodiment 2 of the present invention.

[0055] refer to image 3 , which shows the structure diagram of the data transmission system based on the bus interface described in the second embodiment of the present invention. For the convenience of description, in this embodiment, the figure 2 and image 3 Combine instructions. image 3 The data transmission system based on the bus interface includes figure 2 The bus interface adapter board also includes a USB device and a bus interface.

[0056] In this embodiment, the bus interface adapter board 1 includes: a bus interface connector J1 and a USB interface J2.

[0057] Wherein, the bus interface connector J1 includes n connection wires, and one end of the n connection wires is respectively used to connect to the corresponding n pins in the bus interface 2, wherein n is a positive integer.

[0058] The USB inter...

Embodiment 3

[0103] In this embodiment, the bus interface adopts MINI PCI-E in order to discuss an implementation of the line interface connector J1 in detail. The bus interface connector J1 is a MINI PCI-E connector J1, wherein the MINIPCI-E is a 52-pin device, and each pin of the MINI PCI-E can be called a pin. Then n=52 in MINI PCI-E connector J1.

[0104] refer to Figure 4 , a schematic diagram of the pins of the MINI PCI-E connector described in Embodiment 3 of the present invention is given.

[0105] MINI PCI-E connector J1, when n=52, the connection line J1 of MINI PCI-E connector J1 l ~J1 n Corresponding respectively Figure 4 The connection lines identified by 1 to 52 in . In specific implementation, due to different specific requirements, the MINI PCI-E connector J1 may not only include n connecting wires, such as Figure 4 The two connecting wires 53 and 54 are also included, and the two connecting wires can be grounded.

[0106] Wherein, the connection line correspondin...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a bus interface patch board and a data transmission system. The bus interface patch board comprises a bus interface connector and a universal serial bus (USB) interface. The bus interface connector comprises n connecting wires; one ends of the n connecting wires are respectively connected with corresponding n pins in a bus interface, wherein n is a positive integer. The USB interface comprises m data lines. One ends of the m data lines are respectively connected with corresponding m data lines in USB equipment, wherein m is a positive integer and is less than n; the other ends of the m data lines in the USB interface are respectively connected with the other ends of m connecting wires in the n connecting wires of the bus interface connector. The bus interface patch board provided by the invention is of an integrated overall structure, so that when testing is performed on the bus interface through the USB equipment, a circuit does not need to be constructed temporarily, and therefore, the use is convenient, the connecting stability is higher, the testing efficiency can be improved, and the testing stability and accuracy are ensured.

Description

technical field [0001] The invention relates to communication technology, in particular to a bus interface adapter board and a data transmission system based on the bus interface. Background technique [0002] In 2001, Intel Corporation proposed to replace the peripheral component interconnect bus (Peripheral Component Interconnect, PCI) and the internal connections of various chips with a new generation of technology, and called it the third-generation I / O bus technology. Subsequently, more than 20 leading companies in the industry, including Intel, Advanced Micro Devices (AMD), Dell (DELL), and International Business Machines Corporation (IBM), began to draft specifications for new technologies, and Completed in 2002, it was officially named PCI Express or PCI-E, indicating a new generation of bus interface. [0003] PCI-E uses a point-to-point serial connection. Compared with the shared parallel architecture of PCI and earlier computer buses, each device has its own dedi...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F13/38
Inventor 高云天
Owner 이노피데이인코포레이티드
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap