An enhanced flash chip and a chip packaging method

A chip packaging and enhanced technology, applied in semiconductor/solid-state device components, semiconductor devices, electrical components, etc., can solve the problems of long design cycle, high design complexity, and high design cost, and achieve short design cycle and complex design The effect of low intensity and low cost

Active Publication Date: 2015-09-09
GIGADEVICE SEMICON (BEIJING) INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The invention provides an enhanced FLASH chip and a chip packaging method to solve the problems of high design complexity, long design cycle and high design cost

Method used

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  • An enhanced flash chip and a chip packaging method
  • An enhanced flash chip and a chip packaging method
  • An enhanced flash chip and a chip packaging method

Examples

Experimental program
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Effect test

Embodiment 1

[0038]Embodiment 1 of the present invention proposes an enhanced FLASH chip with RPMC function, and the enhanced FLASH chip may include: FLASH and RPMC packaged together.

[0039] In the embodiment of the present invention, the FLASH and the RPMC may be independent chips. FLASH can choose different capacities to meet the needs of different systems. This FLASH can reuse the designed FLASH chip, so it does not need to be redesigned, which greatly reduces the development cycle; RPMC has the function of response protection monotonic counting, and can also be used alone .

[0040] In the chip with the RPMC function proposed by the embodiment of the present invention, the FLASH and the RPMC may respectively include independent controllers. For the commands sent from the outside, FLASH and RPMC will be controlled by independent controllers to receive and decode them respectively. When the decoding is successful, the corresponding operations will be executed.

[0041] In addition, t...

Embodiment 2

[0046] Next, the enhanced FLASH chip with RPMC function will be introduced in detail through Embodiment 2 of the present invention.

[0047] refer to figure 1 , which shows a schematic diagram of logical connection of an enhanced FLASH chip with RPMC function described in Embodiment 2 of the present invention.

[0048] From figure 1 It can be seen that the enhanced FLASH chip with RPMC function described in the embodiment of the present invention may include FLASH and RPMC packaged together.

[0049] Among them, both FLASH and RPMC include multiple pins respectively, and the same IO pins in RPMC and FLASH can be connected to the same set of external shared pins, and the commands sent externally will be received by RPMC and FLASH at the same time, RPMC and FLASH FLASH can respond accordingly; RPMC and FLASH will also have their own independent IO pins. Moreover, FLASH and RPMC do not need internal interconnection communication. The two chips are packaged together to realize...

Embodiment 3

[0095] Next, the specific packaging method of the above-mentioned enhanced FLASH chip will be introduced through the third embodiment of the present invention.

[0096] refer to image 3 , which shows a flow chart of a chip packaging method described in Embodiment 3 of the present invention, the packaging method may include:

[0097] Step 300, place the FLASH that needs to be packaged and the response protection monotonic counter RPMC on the chip carrier, the FLASH and the RPMC are independent of each other.

[0098] In the embodiment of the present invention, mainly, the FLASH and the RPMC are packaged together to obtain a chip with the RPMC function, and the FLASH and the RPMC in the chip are independent of each other.

[0099] First, the FLASH and RPMC that need to be packaged can be placed on the chip carrier, and the chip carrier described in the embodiment of the present invention can correspond to figure 2 in the Package.

[0100] Preferably, this step 300 may inclu...

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Abstract

The invention provides an enhanced FLASH chip and a method for encapsulating a chip, and aims to solve the problems of high design complexity, long design cycle and high design cost. The enhanced FLASH chip comprises a FLASH and an RPMC (Replay Protection Monotonic Counter) which are encapsulated together, wherein the FLASH and the RPMC comprise an independent controller respectively; the same IO (Input-Output) pins in the FLASH and the RPMC are connected with each other, and are connected to the same external sharing pin of the chip; the insides of the FLASH and the RPMC are in no need of connection with each other; an external instruction is transmitted to the FLASH and the RPMC through the external sharing pin of the chip; and the controllers of the FLASH and the RPMC judge whether the external instruction is executed or not respectively. According to the enhanced FLASH chip and the method for encapsulating the chip, the encapsulating area and the design cost are reduced, the design complexity of the chip is low, and the design cycle is short.

Description

technical field [0001] The invention relates to the field of chip technology, in particular to an enhanced FLASH chip and a chip packaging method. Background technique [0002] The enhanced FLASH with Replay Protection Monotonic Counter (RPMC) is the Basic Input-Output System (BIOS) chip that Intel will promote. It contains a large-capacity FLASH chip and RPMC circuit. Among them, the capacity of the FLASH chip can be 8M, 16M, 32M, 64M, 128M, 256M or higher, and is used to store the code and data of the CPU BIOS; the RPMC circuit ensures the confidentiality and integrity of the read and write data. The RPMC circuit and its integrated FLASH constitute the hardware platform of the BIOS in the personal computer (Personal Computer, PC) system. [0003] At present, when designing chips with RPMC functions, designers usually integrate large-capacity FLASH and RPMC on one chip, that is, RPMC circuits and FLASH are designed together. [0004] However, this design method has the f...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L25/18H01L23/31H01L21/98
CPCH01L2224/05554H01L2224/48145H01L2224/48227H01L2224/49171
Inventor 胡洪舒清明张赛张建军刘江潘荣华
Owner GIGADEVICE SEMICON (BEIJING) INC
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