Check patentability & draft patents in minutes with Patsnap Eureka AI!

A kind of nand flash memory chip and its chip programming method during checkerboard inspection

A flash memory chip and programming method technology, applied in the storage field, can solve the problems of slow test speed, time-consuming, high test cost, etc., and achieve the effect of improving test speed, shortening test time and reducing test cost

Active Publication Date: 2016-03-30
GIGADEVICE SEMICON (BEIJING) INC
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The traditional method of checkboard testing based on pagebypage-based chippageprogram and pageread has a serious disadvantage: in each pageprogram, the data needs to be transferred to the cachebuffer one by one, and in each pageread, the data also needs a One by one is transmitted from the cachebuffer to the IO port to complete the verification, so it takes a lot of time, the test speed is very slow, and the test cost is high

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A kind of nand flash memory chip and its chip programming method during checkerboard inspection
  • A kind of nand flash memory chip and its chip programming method during checkerboard inspection
  • A kind of nand flash memory chip and its chip programming method during checkerboard inspection

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0052] Embodiment one, a kind of NAND flash memory chip, comprises: main array, built-in sample generator;

[0053] The control module is used to instruct the built-in sample generator to generate the sequence required for chip programming when the checkerboard check is to be performed; after the built-in sample generator generates the sequence, initiate a programming execution command to convert the sequence from The built-in sample generator is transferred to the main array for programming.

[0054] In this embodiment, the control module is further configured to initiate a WriteEnable (write enable) command before instructing the built-in sample generator to generate a sequence required for chip programming. If the command has been initiated before, the built-in sample generator can be directly instructed to generate the sequence required for chip programming.

[0055] In this embodiment, the control module can, but is not limited to, instruct the built-in sample ge...

Embodiment 2

[0068] Embodiment 2, a chip programming method during checkerboard inspection of a NAND flash memory chip, comprising:

[0069] When a checkerboard check is to be performed, the sequences required for chip programming are generated inside the chip;

[0070] After the sequence is generated, a programming execution command is initiated to transfer the generated sequence to the main array of the chip for programming.

[0071] In this embodiment, before generating the sequence required for chip programming, a WriteEnable (write enable) command is initiated first. If the command has been initiated before, the sequence required to program the chip can be directly generated.

[0072] In this embodiment, the sequence required for chip programming may be generated, but not limited to, by executing a Programload (program loading) command. The Programload in this embodiment no longer needs to transfer DataBytes from the outside of the chip to the CacheBuffer one by one like t...

Embodiment 3

[0085] Embodiment three, a kind of NAND flash memory chip, comprises: main array, built-in automatic verifier;

[0086] The control module is used to read out the data in the main array page by page and transmit it to the built-in automatic verifier after the chip programming is completed;

[0087] The built-in automatic validator is used to validate the received data.

[0088] In this embodiment, the control module can, but is not limited to, execute the Pageread command to read the data in the main array page by page and send it to the built-in automatic verifier; different from the traditional method, after the Pageread command is initiated, it is no longer The data in the selected Page is first transmitted to the CacheBuffer, and then transmitted to the IO port by the CacheBuffer, but the data in the Page is transmitted to the "built-in automatic verifier (Internalautomaticverify)" to complete the CheckBoard verification directly, thus saving the data A large amou...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides an NAND flash memory chip and a chip programming method in a check board test of the NAND flash memory chip. The NAND flash memory chip comprises a main array, a control module and a built-in sample generator, wherein the control module is used for instructing the built-in sample generator to generate sequences needed by chip programming when the check board test is implemented; when the built-in sample generator generates the sequences, a programming executing command is initiated, and the sequences are sent to the main array to be programmed from the built-in sample generator. According to the NAND flash memory chip and the chip programming method, the NAND Flash test speed is enhanced, and the test cost is lowered.

Description

technical field [0001] The invention relates to the field of storage, in particular to a NAND flash memory chip and a method for programming the chip during checkerboard checking. Background technique [0002] In the NAND Flash (flash memory) test, there is an important and basic test, the basic process of which is: program the cell (unit) on the entire chip into the interval combination of "0" cell and "1" cell, and each "0" The surrounding four cells adjacent to each "1" cell are all "1", and the surrounding four cells adjacent to each "1" cell are all "0". This distribution diagram is also called "CheckBoard (checkboard check)" . figure 1 It is a schematic diagram of a part of the chip area when performing CheckBoard, including 9 cells arranged in 3 rows and 3 columns, and the cells in the three columns are respectively connected to the three bit lines BL <n-1>、BL <n>, BL<n+1> connected, the three rows of cells are respectively connected to the three ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/10
Inventor 苏志强丁冲
Owner GIGADEVICE SEMICON (BEIJING) INC
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com