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High-precision and low-power-consumption FFT (fast Fourier transform) processor

A processor and generator technology applied in the field of FFT processors to achieve the effects of small area, flexible configuration, and low power consumption

Inactive Publication Date: 2013-11-27
FUDAN UNIV
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  • Claims
  • Application Information

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Problems solved by technology

Therefore, how to reduce the power consumption of the system while maintaining sufficient processing accuracy has become a major challenge in the design of fast Fourier transform (FFT) processors

Method used

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  • High-precision and low-power-consumption FFT (fast Fourier transform) processor
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  • High-precision and low-power-consumption FFT (fast Fourier transform) processor

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Embodiment Construction

[0016] Improved block floating point techniques such as figure 2 As shown, taking the 64-point FFT operation as an example, after the first stage operation, the subsequent calculation can be divided into four independent parts, each part adopts an independent scaling factor, and its value is determined by the largest data in this part Decide. There are four scaling factors in the entire calculation process, the first scaling factor controls the 0-15 points, the second scaling factor controls the 16-31 points, and the third scaling factor controls the 32-47 points, The fourth scaling factor controls points 48-63. Compared with single scaling, this improved method has higher precision; compared with floating-point calculations, this fixed-point-based scaling mechanism has less hardware overhead, requiring only a few comparators and registers.

[0017] In the DSP system, the quantization error caused by the finite word length effect is unavoidable. In the FFT operation, the d...

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Abstract

The invention belongs to the technical field of an integrated circuit design, and particularly relates to a high-precision and low-power-consumption FFT processor. The FFT processor adopts a storage device interaction based framework, and comprises a butterfly computation unit, an address generator, a data storage device, a twiddle factor storage device and a zoom factor generator. The high-precision and low-power-consumption FFT processor adopts an improved block floating point technology and or gate based Trounding technology, a data path is equipped with a constant coefficient multiplying unit array and a common plural multiplying unit, and which module is used for multiplying operation is selected according to a data sequence number based determination mechanism. The FFT process has small error and high entire conversion accuracy, and can effectively reduce the power consumption of the multiplying operation; and the FFT processor can be excellently applied to an embedded type low-power-consumption system.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit design, and in particular relates to an FFT processor. Background technique [0002] In recent years, the development of wearable and implantable biomedical devices has received extensive attention. In the field of signal processing, many biomedical signal processing platforms have been proposed to process a variety of different human body signals, such as cardiopulmonary signals, ECG signals, and heart rate fluctuation signals. In these systems, the Fast Fourier Transform converts the time-domain signal into a frequency-domain signal, which is used for spectral analysis of the signal and is one of the most energy-consuming operations. Therefore, how to reduce the power consumption of the system while maintaining sufficient processing accuracy has become a major challenge in the design of Fast Fourier Transform (FFT) processors. Meanwhile, in the field of digital communication, Orthog...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/14
Inventor 薄一帆韩军窦仁峰曾晓洋
Owner FUDAN UNIV
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