Dependent task scheduling method of heterogeneous multi-core processor

Abstract

The invention belongs to the field of performance improvement of processors and particularly relates to a dependent task scheduling method of a heterogeneous multi-core processor. The method comprises the following steps: (1) calculating a task priority; (2) selecting a processor; and (3) scheduling and optimizing. According to the dependent task scheduling method, tasks are distributed into a processor inner core by taking executing time of a backward key path as a weight under a current structure so as to overcome the disadvantage of an existing scheduling method that a greedy thought selection processor inner core is commonly adopted to cause locally optimal solution; the whole minimum finishing time of a task pattern is obtained by considering an overall situation; and a task executing length is shortened in the scheduling process so that the utilization rate of the processor is improved. The method provided by the invention and the existing scheduling method are subjected to an instance analysis and a simulation experiment to test and verify that the task scheduling efficiency of the method is improved by about 18.3% when being compared with that of the previous method; when the quantity of tasks and the quantity of the processor inner cores are increased, the superiority of the method is more highlight; and the finishing time of the task pattern is shortened and the utilization rate of the processor is improved.

Description

technical field [0001] The invention belongs to the field of processor performance improvement, in particular to a dependent task scheduling method of heterogeneous multi-core processors. Background technique [0002] With the continuous improvement of processor design technology and chip technology, the transistor integration of processor chips has gradually reached the limit, and the pure hardware technology improvement is no longer the key to the improvement of computer performance. With the increasing attention of relevant domestic and foreign research institutes to the field of high-performance computing, processor frequency and chip integration have been greatly improved, but most of them use traditional superscalar and super-pipeline technology to develop processor parallelism, processing The cost of processor design is high, and the improvement of processor performance encounters a bottleneck. In view of the development status of processors, multi-core processors (C...

AI Technical Summary

Problems solved by technology

In dealing with task scheduling problems in heterogeneous environments, researchers ignore the differences in task execution overhead, use isomorphic task scheduling algorithms, and use the average value of parameters as a measure of the execution efficiency of tasks on different processors. In large cases, it greatly hinders the performance of heterogeneous multi-core processors

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