Serial memory chip capacity expansion structure

Abstract

The invention relates to the field of serial memories in integrated circuits, in particular to a serial memory chip capacity expansion structure which is simple in structure, short in development period, capable of conveniently realizing the expansion of the capacity of a serial memory chip, and low in cost. The serial memory chip capacity expansion structure comprises at least two wafers with the same capacity, wherein the power supply VCC (Voltage to Current Converter) and ground VSS (Inverted Shared Series) of each wafer are respectively connected in parallel through buses; other ports of each wafer are respectively and correspondingly connected in parallel through the buses.

Description

technical field [0001] The invention relates to the field of serial memories in integrated circuits, in particular to a serial memory chip capacity expansion structure. Background technique [0002] There are usually two methods when the existing serial interface memory chips need to expand capacity: see figure 1 As shown, the first one needs to be implemented on the PCB printed circuit board through a chip-level connection scheme. For example, the I2C interface allows up to 8 chips to achieve capacity expansion through different address settings; see figure 2 As shown, the second is to replace a new chip with a larger capacity. For example, the chip model of the I2C interface 64Kb is 24C64. If 512Kb is required, a new 24C512 needs to be replaced to increase the capacity. The disadvantages of these two methods are: the first method will generate higher costs at the user level; the second method requires a brand new product, and if independent development requires greater c...

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Problems solved by technology

The disadvantages of these two methods are: the first method will generate higher costs at the user level; the second method requires a brand new product, and if independent development requires greater capital investment (masks, etc.), the development of serialized series When using memory chips, the method of large capacity compatible with small capacity is often used. For example, a memory with a capacity of 4A can be compatible with a chip with a capacity of 2A or A. The problem is that the competitiveness of small capacity is not enough.

Another way is to develop each capacity, and the cost will be very high

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