Three-level pulse extension control method and three-level pulse extension device of DSPACE based on FPGA

Abstract

The invention discloses a three-level pulse extension control method and a three-level pulse extension device of a DSPACE based on an FPGA, wherein the three-level pulse extension control method and the three-level pulse extension device are suitable for being applied to experiments and industries. The three-level pulse extension device is composed of an interface conversion circuit, a pulse signal extension processing unit, a power source circuit and a photovoltaic conversion circuit. A pulse wave shape of a digital pulse board card DS5101 of the DSPACE is input to the interface conversion circuit, the interface conversion circuit sends pulse signals to the pulse signal extension processing unit through matching of logic levels, and the pulse signals meeting the drive requirement are sent to the photovoltaic conversion circuit after being necessarily processed. By means of the three-level pulse extension device and the three-level pulse extension control method, extension of three-level pulse output of the DSPCE can be achieved, the inherent shortcoming that digital pulses with the duty ratio being 0 and 100% cannot be output is overcome, the application range of the DSPACE in the experiment research of three-level medium-voltage frequency converters and industries is expanded, and the application prospects are wide.

Description

technical field [0001] The invention relates to an FPGA-based DSPACE three-level pulse extension control method and a device thereof, which belong to the technical field of power electronics and are suitable for experiments and industrial applications. Background technique [0002] In recent years, with the maturity of full-control power device production technology, more and more high-voltage and high-power frequency converters choose to use multi-level technology. Advantage. Therefore, how to use the advantages of DSPACE in algorithm implementation to carry out experimental research and development and industrial application of high-voltage and high-power multi-level inverters has become an urgent problem to be solved. [0003] At present, the DWO language of the modified DS5101 board is mostly used to realize the extended function of the multi-level pulse, but due to the inherent defects in the execution of the underlying DWO language, the three-level PWM pulse output ca...

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Problems solved by technology

[0009] Therefore, it can be seen that for the A-phase bridge arm, there are three effective switching states S A =0,1,-1 correspond to S respectively a1 = 0S a2 = 1S a3 = 1S a4 = 0, S a1 = 1S a2 = 1S a3 = 0S a4 = 0, S a1 = 0S a2 = 0S a3 = 1, S a4 =1, the output waveform of the DS5101 digital output board is shown in Figure 5(a). From the waveform shown in Figure 5(a), it can be seen that for one phase bridge arm (take A phase as an example) in half the power frequency cycle In phase A, the first power tube should be kept off and the second power tube should be kept on. It is not difficult to find out through the above analysis that the DS5101 digital pulse output board of DSPACE1005 is due to its Its own language defects prevent it from being directly applied to three-level inverters

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