A radio frequency chip interface circuit

A technology of interface circuit and radio frequency chip, which is applied to recording carriers used in machines, instruments, computer components, etc., can solve the problems of low data transmission rate and high power consumption, and achieve the effect of increasing data communication rate and reducing power consumption

Active Publication Date: 2016-12-21
苏州简约纳电子有限公司
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a radio frequency chip interface circuit with high transmission rate and low power consumption, so as to solve the problems of low data transmission rate and high power consumption of the radio frequency chip interface circuit in the prior art

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A radio frequency chip interface circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0008] The technical solutions of the present invention will be described in further detail below with reference to the accompanying drawings and embodiments.

[0009] figure 1 It is a schematic structural diagram of a radio frequency chip interface circuit according to an embodiment of the present invention. Such as figure 1 As shown, the interface circuit 200 includes a data transceiving module 201, a DMA (DirectMemory Access, direct memory access) data transmission engine 203 connected with the data transceiving module 201, a multiplexer 204 connected with the DMA data transmission engine 203, and a multiplexer. AXI bus master interface 211 and AXI bus master interface 212 connected to road selector 204, event table control unit 205 connected with data transceiver module 201, sleep-wake switching unit 206 connected with event table control unit 205 and reference clock unit 207 , the slow clock timer 208 connected to the reference clock unit 207 , the AXI bus slave interfa...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention relates to a radio-frequency chip interface circuit. The interface circuit comprises: a data transceiver module for receiving or transmitting data; a DMA data transmission engine which is connected with the data transceiver module for data transmission; an event list control unit which is connected with the data transceiver module for completing the trigger operation control of events; and a sleep-awaken switching unit which is connected with the event list control unit for completing the fast and slow clock frequency switching in the sleep and awaken processes. According to the invention, by improving the interface of the data transceiver module, the data communication rate between the interface circuit and a radio-frequency chip can be improved, and by adding the sleep-awaken switching function, the overall power consumption of the system can be reduced.

Description

technical field [0001] The invention relates to integrated circuit technology, in particular to a radio frequency chip interface circuit. Background technique [0002] The radio frequency chip interface circuit is an interface circuit that connects the baseband chip with the off-chip radio frequency chip for data transmission and reception interaction. [0003] The radio frequency chip interface circuit in the prior art usually has only one data interface to communicate with the radio frequency chip, and can only support one radio frequency antenna, and can only send 1 bit of data per clock cycle, its data transmission rate is low, and there is only one The 32-bit data bus has a small data throughput. In addition, the overall power consumption of the radio frequency chip interface circuit in the prior art is relatively large. Contents of the invention [0004] The object of the present invention is to provide a radio frequency chip interface circuit with high transmissio...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): G06K19/077
Inventor 卢建政吉亚平邢娅玲于洲林晗
Owner 苏州简约纳电子有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap