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A method of manufacturing a semiconductor device

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as product yield decline, process complexity, and increased semiconductor device manufacturing costs, so as to ensure product yield, The effect of streamlining process and reducing cost

Active Publication Date: 2017-06-13
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0016] In the above-mentioned semiconductor device manufacturing method using double patterning technology, step 4 requires cutting and etching process (cutting photo) for the spacer, which not only leads to the complexity of the process method, but also affects the alignment accuracy. raised a challenge
The complexity of the process will increase the manufacturing cost of semiconductor devices; and if the alignment accuracy is not enough, it will easily lead to a decline in product yield

Method used

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  • A method of manufacturing a semiconductor device
  • A method of manufacturing a semiconductor device
  • A method of manufacturing a semiconductor device

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Embodiment Construction

[0045] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0046] In order to thoroughly understand the present invention, detailed steps will be presented in the following description in order to explain the manufacturing method of the semiconductor device proposed by the present invention. Obviously, the practice of the invention is not limited to specific details familiar to those skilled in the semiconductor arts. Preferred embodiments of the present invention are described in detail below, however, the present invention may have other embodiments besides these detailed descriptions.

[0047] It should be understo...

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Abstract

The invention provides a manufacturing method of a semiconductor device and relates to the field of semiconductor technology. The method includes the following steps: Step S101: Form a pattern of the core material layer on the semiconductor substrate on which the film to be patterned is formed; Step S102: Process the core material layer so that different surfaces of the core material layer have different substance deposition rates; Step S103: Form a spacer material film on the semiconductor substrate; Step S104: Etch the spacer material film to form a pattern of the spacer layer; Step S105: Remove the core material layer; Step S106: Treat the to-be- The patterned film is patterned; step S107: remove the spacer layer. This method improves the dual patterning technology and omits the cutting and etching process after the spacer layer is formed in the traditional dual patterning technology, thereby ensuring the product yield while streamlining the process and reducing costs.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a semiconductor device. Background technique [0002] With the development of semiconductor manufacturing technology to the 22nm node and below, double patterning has become a very promising method to achieve more precise patterns at increasingly smaller critical dimensions (CD). [0003] The traditional double patterning technology requires a cutting and etching process (cutting photo) after the spacer is formed, which complicates the process method and poses challenges to the alignment accuracy. [0004] Below, combine Figure 1A to Figure 1F , to illustrate the traditional method of manufacturing semiconductor devices using double patterning technology. in, Figure 1A -1, Figure 1B -1, Figure 1C -1, Figure 1D -1, Figure 1E -1 and Figure 1F -1 is the front view of the pattern formed after each process is completed; Figure 1A -2, ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/02
CPCH01L21/31105H01L21/31155H01L21/8238H01L21/022
Inventor 邓浩张彬向阳辉鲍宇
Owner SEMICON MFG INT (SHANGHAI) CORP