Hybrid reset control circuit and implementation method for CMOS image sensor unit
An image sensor, reset control technology, applied in image communication, TV, electrical components, etc., can solve the problem of unable to expand the well capacity of the pixel unit, unable to simultaneously exert the advantages of consistent control to suppress noise, and limit the dynamic range output characteristics of the sensor unit and other problems, to achieve the effect of improving the intrinsic dynamic range output capability, eliminating hard reset, and suppressing image noise.
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[0038] 4T-APS pixel unit equivalent circuit structure is as follows image 3 Shown inside the middle a area frame: including reset tube RST (W / L=0.9um / 0.9um) and its threshold voltage V TH_RST =0.7V, transmission tube TG (W / L=0.45um / 0.45um), clamping photodiode PPD (W / L=3um / 3um) with clamping voltage Vpinned=1.5V, source follower tube SF (W / L=1.35um / 0.9um) and row selection control tube RS (W / L=0.4um / 0.4um). The drain of the reset tube RST and the source follower tube SF is connected to the pixel unit power supply V reset_VDD , The anode of the clamp-type photodiode is connected to GND, the source end of the reset tube RST, the gate end of the source follower tube SF, and the drain end of the transmission tube TG are connected to form an electrical signal control reading of the parasitic capacitance FD; The position type photodiode PPD is connected to complete the reset of the clamp type photodiode PPD and the control of the photoelectric signal transfer; the row selection co...
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