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Hybrid reset control circuit and implementation method for CMOS image sensor unit

An image sensor, reset control technology, applied in image communication, TV, electrical components, etc., can solve the problem of unable to expand the well capacity of the pixel unit, unable to simultaneously exert the advantages of consistent control to suppress noise, and limit the dynamic range output characteristics of the sensor unit and other problems, to achieve the effect of improving the intrinsic dynamic range output capability, eliminating hard reset, and suppressing image noise.

Inactive Publication Date: 2014-03-26
NO 771 INST OF NO 9 RES INST CHINA AEROSPACE SCI & TECH
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since the power supply in the pixel unit of the conventional 4T-APS structure is a fixed value (VDD), only a specific reset (soft reset or hard reset) can be implemented for the pixel unit, and hard reset cannot be used at the same time for array consistency control and soft reset. Reset has the advantage of suppressing noise for the pixel unit, and the fixed power supply method cannot expand the well capacity of the pixel unit, which limits the dynamic range output characteristics of the sensor unit

Method used

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  • Hybrid reset control circuit and implementation method for CMOS image sensor unit
  • Hybrid reset control circuit and implementation method for CMOS image sensor unit
  • Hybrid reset control circuit and implementation method for CMOS image sensor unit

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Embodiment

[0038] 4T-APS pixel unit equivalent circuit structure is as follows image 3 Shown inside the middle a area frame: including reset tube RST (W / L=0.9um / 0.9um) and its threshold voltage V TH_RST =0.7V, transmission tube TG (W / L=0.45um / 0.45um), clamping photodiode PPD (W / L=3um / 3um) with clamping voltage Vpinned=1.5V, source follower tube SF (W / L=1.35um / 0.9um) and row selection control tube RS (W / L=0.4um / 0.4um). The drain of the reset tube RST and the source follower tube SF is connected to the pixel unit power supply V reset_VDD , The anode of the clamp-type photodiode is connected to GND, the source end of the reset tube RST, the gate end of the source follower tube SF, and the drain end of the transmission tube TG are connected to form an electrical signal control reading of the parasitic capacitance FD; The position type photodiode PPD is connected to complete the reset of the clamp type photodiode PPD and the control of the photoelectric signal transfer; the row selection co...

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Abstract

The invention provides a hybrid reset control circuit and implementation method for a CMOS image sensor unit. A control circuit produces different supply voltages for a pixel unit to achieve hybrid reset of the pixel unit; under the condition of intermediately changing drain voltage, a source follower gate / drain overlap capacitance in the pixel unit triggers clock feed-through effect which achieves the jump process of reset voltage of stray memory nodes in pixels. The hybrid reset control circuit and implementation method has the advantages that the conventional second low-noise soft reset readout process of the pixel unit is achieved, the stray memory nodes obtain high reset readout voltage during supply voltage jumping, the design purpose of expanding well capacity is achieved, and finally intrinsic dynamic range output capacity of the pixel unit is improved.

Description

Technical field [0001] The invention relates to the technical field of CMOS image sensors, in particular to a hybrid reset control circuit and an implementation method for improving the noise suppression and photoelectric full-well capability of 4T-APS CMOS image sensor units. Background technique [0002] CMOS image sensor (hereinafter referred to as CIS) has the advantages of small size, low power consumption, low cost, high integration, no halo, etc., and is one of the most popular sensor devices at present. However, as market demand continues to increase the size of pixels, the design needs to continuously compress the size of the pixel unit in the CIS chip in order to obtain more pixel units per unit area, which will result in the reduction of the photosensitive area of ​​a single pixel and the control within the pixel. Circuit simplification and other issues have weakened the noise suppression and light sensitivity of the pixel unit. In addition, the integration of more pi...

Claims

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Application Information

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IPC IPC(8): H04N5/374H04N5/3745
Inventor 张冰汪西虎杨力宏赵光炜徐晚成
Owner NO 771 INST OF NO 9 RES INST CHINA AEROSPACE SCI & TECH
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