442 results about "Consistency control" patented technology

A hardware transactional memory 12, 14, 16, 18, 20 is provided within a multiprocessor 4, 6, 8, 10 system with coherency control and hardware transaction memory control circuitry 22 that serves to at least partially manage the scheduling of processing transactions in dependence upon conflict data 26, 28, 30. The conflict data characterises previously encountered conflicts between processing transactions. The scheduling is performed such that a candidate processing transaction will not be scheduled if the conflict data indicates that one of the already running processing transactions has previously conflicted with the candidate processing transaction.

A shared bypass bus structure for low-latency coherency controller access in a coherent scalable switch. In a coherent scalable switch with multiple coherent interconnect ports, distributed coherency control structures, and a crossbar interface between them, a shared bypass bus permits data transfer between the coherent interconnect ports and the coherency control structures while bypassing the crossbar interface. Some embodiments may comprise scalable switches to support one or more sets of processors with substantially independent snoop or cache coherency paths or arrangements.

A hardware transactional memory 12, 14, 16, 18, 20 is provided within a multiprocessor 4, 6, 8, 10 system with coherency control and hardware transaction memory control circuitry 22 that serves to at least partially manage the scheduling of processing transactions in dependence upon conflict data 26, 28, 30. The conflict data characterises previously encountered conflicts between processing transactions. The scheduling is performed such that a candidate processing transaction will not be scheduled if the conflict data indicates that one of the already running processing transactions has previously conflicted with the candidate processing transaction.

A multiprocessor system with cells having a plurality of CPUs sharing a memory and a consistency control device connected through a network, in which the consistency control device includes a request unit which issues an access request and a speculative access request, a home unit which receives an access request from the request unit of each cell, and an owner unit which receives a speculative access request from the request unit of each cell, the request unit further including an owner decision unit which predicts a cell holding requested data and a determination unit which determines whether processing based on prediction is to be conducted or not.

A multi-processor, multi-cache system has filter pipes that store entries for request messages sent to a central coherency controller. The central coherency controller orders requests from filter pipes using coherency rules but does not track completion of invalidations. The central coherency controller reads snoop tags to identify sharing caches having a copy of a requested cache line. The central coherency controller sends an ordering message to the requesting filter pipe. The ordering message has an invalidate count indicating the number of sharing caches. Each sharing cache receives an invalidation message from the central coherency controller, invalidates its copy of the cache line, and sends an invalidation acknowledgement message to the requesting filter pipe. The requesting filter pipe decrements the invalidate count until all sharing caches have acknowledged invalidation. All ordering, data, and invalidation acknowledgement messages must be received by the requesting filter pipe before loading the data into its cache.

Expandable and hydrophilic polymeric particles may be made in a non-emulsion system, and with controllable hardness and delay in their time to swell in a fresh or salt water environment. These particles are prepared from combining monomers, controlled monomers, stable cross-linkers, initiators, and other agents, in aqueous solution. The controlled monomers induce kinetically controllable decomposition, degrading over time, thus inducing a desired time delay in particle swelling. The delay and degree of the swelling of the particles is controlled by selection of controlled monomer, stable cross-linking agents, monomers, and process conditions. These preformed particle gels are made to an initial particle size of 0.1 micron in diameter or larger via different grinding techniques. This composition is used for modifying the permeability of subterranean formations and thereby increasing the recovery rate of hydrocarbon fluids present in the formation.

A coherence controller is included in a module which includes a plurality of multiprocessor units, each of which contains a main memory and processors equipped with respective cache memories. The module may be one of a plurality of similarly constructed modules connected by a router or other type of switching device. The coherence controller in each module includes a cache filter directory having a first filter directory for guaranteeing coherence between the local main memory and the cache memory in each of the processors of the module, and an external port connected to at least one of the other modules. The cache filter directory also includes a complementary filter directory, which tracks locations of lines or blocks of the local main memory copied from the module into other modules, and for guaranteeing coherence between the local main memory and the cache in each of the processors of the module and the other modules.

A lightweight coherency control protocol ensures consistency of data containers, such as a file, and associated data buffers stored on one or more volumes served by a plurality of nodes, e.g., storage systems, connected as a cluster. Each data buffer is associated with a current cache sequence number comprising a load generation value and an update count value. The load generation value is incremented every time an inode of a file is loaded into a memory of the storage system. Once the inode is loaded and its load generation value is set, then the appropriate buffer of a buffer tree for the file is loaded into the memory. The update count value is incremented each time the buffer is updated with a write request/operation. Therefore, each buffer loaded into memory is tagged with the load generation value and an update count from the time that buffer is loaded.

A network on chip (‘NOC’) that maintains cache coherency, the NOC including integrated processor (‘IP’) blocks, routers, memory communications controllers, and network interface controller, each IP block adapted to a router through a memory communications controller and a network interface controller, at least one memory communications controller further comprising a cache coherency controller each memory communications controller controlling communication between an IP block and memory, and each network interface controller controlling inter-IP block communications through routers, wherein the memory communications controller configured to execute a memory access instruction and configured to determine a state of a cache line addressed by the memory access instruction, the state of the cache line being one of shared, exclusive, or invalid; the memory communications controller configured to broadcast an invalidate command to a plurality of IP blocks of the NOC if the state of the cache line is shared; and the memory communications controller configured to transmit an invalidate command only to an IP block that controls a cache where the cache line is stored if the state of the cache line is exclusive.

A shared main memory type multiprocessor is arranged to have a switch connection type. The multiprocessor prepares an instruction for outputting a synchronization transaction. When each CPU executes this instruction, after all the transactions of the preceding instructions are output, the synchronization transaction is output to the main memory and the coherence controller. By the synchronization transaction, the main memory serializes the memory accesses and the coherence controller guarantees the completion of the cache coherence control. This makes it possible to serialize the memory accesses and guarantee the completion of the cache coherence control at the same time.

Compositions and methods are provided for reducing the permeability of subterranean zones. More particularly, water-soluble polymeric compositions which form cross-linked gels in the zones. In general, the composition comprises (a) at least one water-soluble polymer; (b) at least one organic gelling agent capable of cross-linking the water-soluble polymer; and (c) at least one water-soluble formate. More preferably, the water-soluble polymer is a copolymer of (i) at least one non-acidic ethylenically unsaturated polar monomer, and (ii) at least one copolymerisable ethylenically unsaturated ester. The gelling agent is preferably selected from the group consisting of a polyalkyleneimine, polyfunctional aliphatic amine, an aralkylamine, and a heteroaralkylamine. The preferred water-soluble formate is selected from the group consisting of ammonium formate, lithium formate, sodium formate, potassium formate, rubidium formate, cesium formate, and francium formate. Water is used to make an aqueous composition prior to use in a subterranean formation. The methods of this invention for reducing the permeability of a subterranean zone are comprised of the steps of introducing an aqueous composition according to the invention into a subterranean zone, and then allowing the aqueous composition to form a cross-linked gel in the zone. Preferably, the method includes the step of subsequently producing hydrocarbons from the subterranean formation.

The present disclosure provides a polymer gel and method of making and using the same for use in high-permeability layers. This precision conformance control is accomplished by using paramagnetic nanoparticles and the application of the magnetic oscillation of prescribed frequency at the wellbore. If the polymer gel were created unintentionally at a certain layer, or there is a need to remove the gel blockage at the later stage of oil production, the gel could be broken and removed to restore the productivity from the layer.

A method, apparatus and production well system that utilize stimulus-responsive materials for “conformance control” and profile control along the fluid flow path in a well as part of a gravel pack or a coating on a well tool. The stimulus-responsive materials are also known as intelligent or smart polymers and are typically polymeric materials that reversibly or irreversibly swell or collapse in the presence of stimulus such as changes in concentration of a fluid media in contact with the stimulus-responsive material, pH or polarity of the media the stimulus-responsive material is in contact with, salinity, current; or temperature. The stimulus-responsive materials may swell upon contact with a rust stimulus and shrink or collapse upon contact with a second stimulus or vice-versa The changes between production and injection profiles may be automatic with the application of the stimulus-responsive materials and may occur without user intervention.

The invention discloses a specific performance based consistency control method for multiple intelligent agents. The control method comprises that the intelligent agents as communication nodes establish a communication topology; neighbor node and self state information is obtained according to the communication topology; the state information includes the position and speed; a tracking error of aleader is calculated according to the state information; the specific performance of the tracking error is transformed via a design performance function, and a transformed error model is obtained; andaccording to the transformed error model, an event triggering adaptive controller of a follower is designed via a backstepping method and a dynamic surface technology, an event triggering mechanism is designed, and specific performance based consistency control for the intelligent agents is realized. A system can obtain expected transient performance and stable error in the control process rapidly and precisely, the communication cost among the intelligent agents can be reduced, the application range is wide, and the application value is high.

A coherency controller for configurable caches. A base microprocessor design accommodates system configurations both with and without L2 cache tag and data arrays installed. Second level cache control logic exists within the microprocessor chip, and when the external second level cache tag and data arrays are removed their inputs to the microprocessor are tied to an inactive state. A configuration switch is set in the second level cache controller that causes snoop requests from a system bus to get reflected onto a first level cache snooping path. The first level cache status is then fed back to the second level cache controller, in a manner consistent with the timing required for support of a second level cache search, and fed into the second level cache status signal generation logic, effectively making the second level cache controller believe that the second level cache still exists for snooping. All other actions remain the same in the second level cache controller providing an effective and simple method for supporting snooping bus protocols. A result is that now every bus request snoops the first level cache without knowledge of presence of an L2 cache. This environment is provided to support entry level single processor configurations where the snooping requests only amount to input/output traffic.

Addition, search, and performance of other allied activities relating to keys are performed in a hardware hash table. Further, high performance and efficient design may be provided for a hash table applicable to CPU caches and cache coherence directories. Set-associative tables and cuckoo hashing are combined for construction of a directory table of a directory based cache coherence controller. A method may allow configuration of C cuckoo ways, where C is an integer greater than or equal to 2, wherein each cuckoo way C_i is a set-associative table with N sets, where each set has an associativity of A, where A is an integer greater than or equal to 2.

The invention discloses the optimal consistency control method and system of a nonlinear multi-agent system. The method is characterized by establishing a reference behavior model according to the individual dynamic characteristic of a heterogeneous multi-agent system, and using a leader-follower control model to form a multi-agent system formed by reference behavior models; then, constructing a dynamic graph game global error dynamical model according to the network topology structure of multiple agents, defining a multi-agent local performance index function, and according to the global Nashequilibrium, acquiring a Bellman optimal equation; and then, under the condition of only using local agent information, using an execution-evaluation execution network framework mode based on value function approximation to carry out online iterative learning, and acquiring an optimal consistency protocol to achieve the consistency of each reference model behavior. Compared with the prior art, byusing the method and the system of the invention, under the condition of guaranteeing optimal control performance, the consistency problem of the complex multi-agent system can be high-efficiently solved, and an actual application value and high scalability are achieved.