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A fixed-point fft word length configuration method for pipeline structure

A technology of pipeline structure and configuration method, which is applied in the direction of machine execution devices, electrical digital data processing, digital data processing components, etc., to achieve the effect of maintaining performance balance, resource optimization, and saving storage resource consumption

Active Publication Date: 2016-08-17
BEIJING INSTITUTE OF TECHNOLOGYGY
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Problems solved by technology

[0005] The purpose of the present invention is in order to overcome the defective of prior art, in guaranteeing R2 2 SDF (base 2 2 In the case of single-channel delay feedback) fixed-point FFT output SQNR (signal-quantization noise power ratio), to achieve the goal of saving storage resources, a pipeline structure fixed-point FFT word length configuration method is proposed

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  • A fixed-point fft word length configuration method for pipeline structure
  • A fixed-point fft word length configuration method for pipeline structure
  • A fixed-point fft word length configuration method for pipeline structure

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[0015] The implementation of the method of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0016] A pipeline structure fixed-point FFT word length configuration method, its specific steps include:

[0017] Step 1. Establish a plan to be optimized: figure 1 Shown is the FFT word length configuration diagram at all levels without word length optimization, and this group of word length configuration schemes will be used as the basis for the optimization scheme. The way to build this template: as in figure 1 As shown, first according to base 2 2 FFT structure, 256-point FFT will be decomposed into 4 levels, each level contains two addition operations and a complex multiplication operation, for addition operations, the output word length is increased by one bit compared to the input word length; for complex multiplication operations, the figure uses 1 multiplication and 1 addition means that although complex multiplication...

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Abstract

The invention provides a configuration method for pipeline-architecture fixed-point FFT word length. The configuration method achieves the purpose of saving storage resources under the condition of guaranteeing an R22SDF fixed-point FFT output SQNR. The configuration method comprises the steps that firstly, carry is produced according to addition and subtraction operations per level and according to the algorithm, namely, the word length is increased by a single bit, the word length of operations in all levels for a radix 22 FFT from input to output is calculated, and the configuration scheme of the word length is used as a template of a scheme to be optimized; secondly, with regard to the template, under the condition that the word length of data input and output through each level of multiplication keeps unchanged, the word length of the addition and subtraction operations per level is reduced according to the SQNR requirement, and the configuration scheme of the word length is determined; finally, hardware implementation of the FFT algorithm is performed according to the configuration scheme of the word length, wherein the configuration scheme of the word length is determined in earlier steps, a corresponding basic butterfly operation unit with a bit truncator is designed, and hardware implementation of FFT is performed according to a circuit structure of single-channel delayed feedback.

Description

technical field [0001] The invention belongs to the technical field of digital signal processing, and relates to a fixed-point FFT word length configuration method of a pipeline structure. Background technique [0002] The FFT algorithm is an effective and fast algorithm for implementing DFT (Discrete Fourier Transform). With the development of large-scale integrated circuits and digital signal processing technology, the FFT algorithm has an irreplaceable role and is widely used in radar, sonar , communications and other fields. An FFT implementation algorithm with high precision, high real-time performance and low resource occupation has always been an important research topic in this field, and different implementation methods can be adopted under different application requirements. [0003] The FFT algorithm can be implemented using fixed-point or floating-point data formats. Floating-point FFT has high precision, but due to the use of floating-point data formats, storag...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/38G06F7/57
Inventor 陈禾杨晨谢宜壮杜青陈亮龙腾
Owner BEIJING INSTITUTE OF TECHNOLOGYGY
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