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Interrupt processing method and device

A processing method and processor technology, applied in the field of mobile communications, can solve problems such as inability to support nested interrupts, and achieve the effects of reducing memory size requirements and improving use efficiency

Inactive Publication Date: 2014-05-07
SANECHIPS TECH CO LTD
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  • Claims
  • Application Information

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Problems solved by technology

[0011] The present invention provides an interrupt processing method and device to solve the problem that the prior art cannot support nested interrupts after transplanting μCOS-II to MIPS

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  • Interrupt processing method and device

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Embodiment Construction

[0032] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0033] In order to solve the problem in the prior art that the transplantation of μCOS-II to MIPS cannot support nested interrupts, the present invention provides an interrupt processing method and device. The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the prese...

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Abstract

The invention discloses an interrupt processing method and device. The method comprises the steps of step 1, initializing interrupt and the drive program of the interrupt when a system is initialized, and when the interrupt occurs during execution of a current task, storing the context information of the interrupt field into a preset task stack and determining whether the interrupt is a interrupt nesting; step 2, storing the context information of a current task field into the preset task stack and moving a stack pointer (SP) to an interrupt stack; step 3, informing the system to start entering interrupt processing, reading interrupt priority levels, opening the interrupt, enabling the interrupt nesting, and after executing an interrupt processing program, prohibiting the interrupt, informing the system to exit the interrupt processing and determining whether the system is in the interrupt nesting; step 4, recovering the context information of the stored current interrupt field and returning to upper-layer interrupt; step 5, recovering the context information of the stored current task field and returning to the current task.

Description

technical field [0001] The invention relates to the field of mobile communication, in particular to an interrupt processing method and device. Background technique [0002] In the prior art, embedded systems have relatively high requirements on real-time performance and response speed, support interrupt controllers with different priorities, and require software to support interrupt nesting. With the increasing complexity of embedded systems and the introduction of real-time operating systems, how to support interrupt nesting in real-time operating systems has become a difficult problem. [0003] μCOS-Ⅱ is a preemptive-based real-time multitasking kernel, which can be cured, tailored, and has high stability and reliability. It always runs the highest priority ready task. The number of interrupt nesting layers supported by μCOS-Ⅱ can be as high as 255 layers. [0004] In terms of embedded, Microcomputer without interlocked pipeline stages (MIPS for short) 32 series micropr...

Claims

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Application Information

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IPC IPC(8): G06F9/48
Inventor 韩美卿于光海
Owner SANECHIPS TECH CO LTD
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