Multicore-oriented reconfigurable fault tolerance system and multicore-oriented reconfigurable fault tolerance method

Abstract

The invention provides a multicore-oriented reconfigurable fault tolerance system and a multicore-oriented reconfigurable fault tolerance method. A multi-core processor reconfiguration strategy based on an SOC (System On chip) is adopted for design, a multicore fault tolerance mechanism based on system degradation is provided; by virtue of reconfiguration of working modes of a multi-core processor, the reliability and fault tolerance capability of the system are improved, so that the multicore-oriented reconfigurable fault tolerance system is applicable to complex and severe-environment engineering application such as deep-space exploration.

Description

technical field [0001] The invention relates to a multi-core-oriented reconfigurable fault-tolerant system and method, which are suitable for the design of on-board computer systems in harsh space environments. Background technique [0002] Current space missions put forward higher performance requirements for space electronic systems represented by spaceborne computers, mainly in terms of system size, power consumption, performance, and reliability. The traditional spaceborne computer is facing the need of upgrading, and there is an urgent need to find a new system architecture. [0003] System on Chip (SoC) technology, as a new application-specific integrated chip design method, has achieved rapid development in civilian and military applications, especially multi-core System on Chip (MPSoC) with its high integration, low power consumption, high performance, and high reliability. The characteristics are gradually adopted by aerospace agencies at home and abroad. However,...

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Problems solved by technology

[0005] However, the reconfigurable multi-core system on chip still faces many problems to be solved: the design verification of the system is complicated, and there is a lack of good guidance methods and verification methods; the reconfiguration technology based on dynamic reconfiguration makes full use of the SRAM FPGA Dynamic partial reconfiguration features, but in the space environment, SRAM FPGAs face severe space radiation problems, and reinforcement design issues need to be considered; most of the current reconfigurable processes need to be designed in advance by humans, and the research on automatic reconfiguration transparent to users still needs to be done. It is in its infancy; in addition, the research on reconfigurable multi-core system-on-chip in China, especially in the aerospace field, obviously lags behind the same field in China. It is necessary to study reconfigurable multi-core system-on-chip with independent intellectual property rights

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