Digital calibration method for high-precision SAR ADC (successive approximation register analog to digital converter)

Abstract

The invention discloses a digital calibration method for a high-precision SAR ADC (successive approximation register analog to digital converter). The method comprises the following steps of (1) designing of a calibration DAC (digital to analog converter), digitalizing the error voltage of each capacitor in the high segment of a main DAC, and carrying out digital to analog conversion on the processed calibration codes; (2) designing of digital calibration time sequence, obtaining the calibration codes, maintaining sampling, and gradually converting. The method is applied to the high-precision SAR ADC, and a capacitor array of the high segment in the sectional main DAC is subjected to digital calibration, so the mismatch of the capacitors caused by parasitic capacitors and the process manufacturing error is reduced, the problem of unable realizing of precise double relationship due to the mismatch of the adjacent capacitors in the high segment is greatly corrected, and the precision of the SAR ADC is effectively improved.

Description

technical field [0001] As a method for calibrating the main digital-to-analog conversion (DAC) array in the successive approximation analog-to-digital converter (SAR ADC), the present invention is applied in the design of high-precision SAR ADC, by adding a calibration capacitor at the negative phase end of the comparator array, and cooperate with the invented calibration algorithm to calibrate the capacitance mismatch in the main DAC due to process deviation and parasitic effects, thereby improving the accuracy of the overall analog-to-digital converter. Background technique [0002] As a bridge connecting analog signals and digital signals, analog-to-digital converters have developed rapidly in integrated circuits and information industries. Charge-Redistribution (Charge-Redistribution) successive approximation (SAR) analog-to-digital converters (ADC) have been Since it was proposed in the 1980s [1], it has been widely used because of its comprehensive advantages of medium...

AI Technical Summary

Problems solved by technology

However, under the conditions of the existing manufacturing process, the minimum mismatch rate of the capacitor is 0.1%, which means that the accuracy of the entire ADC can only reach about 10 bits. [3] , so for this kind of mismatch caused by process deviation, it must be calibrated dynamically and in real time

Images