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Display Device And Inspection Method Thereof

A display device and display area technology, applied in static indicators, instruments, etc., can solve the problems that the size of the semiconductor chip mounting area cannot be reduced, and the wiring disconnection inspection cannot be drawn out, and the effect of reducing the size can be achieved.

Inactive Publication Date: 2014-07-16
MITSUBISHI ELECTRIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, this time there was a problem that it was not possible to inspect the disconnection of the lead-out wiring connecting the semiconductor chip mounting area and the display area.
However, in general, various wirings and circuits, such as wirings connecting input bump terminals, are already provided in the semiconductor chip mounting area. chip mounting area, it is considered impossible to reduce the size of the semiconductor chip mounting area

Method used

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  • Display Device And Inspection Method Thereof
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  • Display Device And Inspection Method Thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0022] figure 1 It is a circuit diagram showing the configuration of the display device (display panel) according to Embodiment 1 of the present invention. also, figure 1 The reference numerals of the constituent elements of the display device according to the first embodiment are also assigned to the same or similar constituent elements in the display devices of the other embodiments.

[0023] Such as figure 1 As shown, the display device according to Embodiment 1 includes a substrate 1 provided with a display region 11 and a semiconductor chip mounting region (here, the first and second semiconductor chip mounting regions 31a and 31b) shown by dotted lines, and the two-dot-dashed The gate drive circuit 32a and the source drive circuit 32b shown by the line are configured.

[0024] In the display area 11, a plurality of semiconductor switching elements (here, a plurality of display TFTs (Thin Film Transistor) 12) arranged in a matrix, and a plurality of gate signal lines c...

Embodiment approach 2

[0075] Embodiment 2 of the present invention is a modified example of the basic configuration of Embodiment 1 described above.

[0076] As mentioned above, in the lead-out wiring breakage inspection, attention is paid to whether there is a bright line (normally white) that crosses from one end of the display area 11 to the other end, not whether there is a bright line in the pixel display of the display area 11. Uneven display. That is, in the first and second lead wire disconnection inspection circuits 35a and 35b, it is not necessary to pay attention to unevenness in the display panel surface due to resistance distribution.

[0077] Therefore, in the second embodiment, the wiring width of the inspection signal lines LOCG and LOCS is reduced. Specifically, the wiring width of the inspection signal line LOCG serving as the first lead wire disconnection inspection signal line is configured to be smaller than the wiring width of the inspection signal lines LTGO and LTGE serving...

Embodiment approach 3

[0083] Embodiment 3 of the present invention is a modified example of the basic configuration of Embodiment 1 or 2 described above. Figure 4 It is a circuit diagram showing the configuration of a display device (display panel) according to the third embodiment. Such as Figure 4 As shown, in Embodiment 3, the terminals 36a and 36b for cut-off voltage are provided in the first semiconductor chip mounting region 31a.

[0084] The cut-off voltage terminal 36a is connected to the above-mentioned inspection signal line LTSW, and can apply a common gate potential to the plurality of first and second inspection TFTs 611a and 611b via the inspection signal line LTSW.

[0085] The off-voltage terminal 36b is connected to the inspection signal line LOSW of the first semiconductor chip mounting region 31a via the terminal OSW, and can apply a common gate potential to a plurality of first lead-out wiring disconnection inspection TFTs 351a via the inspection signal line LOSW. . In addi...

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Abstract

A display device has a substrate (1) provided with a display region (11) and first and second semiconductor chip mounting regions (31a,31b). Channel widths of first and second lead-wiring-line disconnection inspection TFTs (351a,351b) provided in the first and second semiconductor chip mounting regions (31a,31b) are smaller than channel widths of first and second inspection TFTs (31a,31b) provided other than in the display region (11) and the first and second semiconductor chip mounting regions .

Description

technical field [0001] The present invention relates to a display device provided with a plurality of semiconductor switching elements and an inspection method thereof. Background technique [0002] The following methods are known: using the lighting / non-lighting of pixels of the display panel included in the display device, the disconnection of the gate signal line and the source signal line of the semiconductor switching element provided in the display area of ​​the display panel or the pixel. Check for defects, etc. As one of the inspection methods, a method is known in which, after the inspection needle is brought into contact with the inspection terminal, the input of the inspection signal to the plurality of gate signal lines and source signal lines is performed using a plurality of inspection semiconductors connected to them. The switching elements are collectively controlled, whereby a plurality of gate signal lines and source signal lines are collectively inspected...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G09G3/20
CPCG09G3/006G09G3/3648
Inventor 奧本和范
Owner MITSUBISHI ELECTRIC CORP
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