Method for accelerating DRAM (dynamic random access memory) sensitive amplifier
A sensitive amplifier and voltage technology, applied in the field of memory, can solve problems affecting the reliability of DRAM memory cells
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[0019] See image 3 with Figure 4 As shown, in order to improve tRCD (that is, to speed up the amplification speed of the sensitive amplifier), a method for accelerating the DRAM sensitive amplifier of the present invention includes the following steps:
[0020] The gate signal SANT of NMOS1 rises to turn on NMOS1, so that the drain signal NCS of NMOS1 is pulled down to the ground voltage, and the reference bit line bl_n starts to be pulled to the ground voltage;
[0021] Then, the gate signal SAP1T of NMOS3 rises to a high level, turning on NMOS3, the source signal PCS of NMOS3 is pulled up to vod, the voltage of bit line bl is quickly pulled up to higher than the voltage VBLH, and then the gate signal of NMOS3 SAP1T changes to a low level; the gate signal SAP2T of NMOS2 changes to a high level, turning on NMOS2, the source signal PCS of NMOS2 is pulled to the voltage VBLH, and the bit line bl slowly decreases to the voltage of VBLH.
[0022] This method improves the amplification ...
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