Chip mounting process for semiconductor chip packaging process

Abstract

The invention provides a chip mounting process for a semiconductor chip packaging process. The chip mounting process comprises a first step of heating a chip mounting head to a preset temperature; a second step of adsorbing the chip mounting head to a semiconductor chip to conduct the preset temperature to the semiconductor chip from the chip mounting head; a third step of providing a packaging substrate, enabling the position of the packaging substrate where the semiconductor chip is to adhere to be coated with conductive slurry, attaching the semiconductor chip to the packaging substrate through the conductive slurry by means of the chip mounting head, and finally removing the chip mounting head to fix the semiconductor chip on the packaging substrate. The heating of the chip mounting process is transferred to the chip small in thermal expansion coefficient from the substrate high in thermal expansion coefficient, warping of the substrate can be effectively reduced; a substrate heating step is omitted, silver paste is solidified in a follow-up solidification processing process, process time is saved, the production cost is reduced, the warping probability of the substrate is also reduced, and the rate of finished products is improved.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a patching process used in the packaging process of semiconductor chips. Background technique [0002] In the 1990s, with the advancement of integration technology, the improvement of equipment, and the use of deep submicron technology, LSI, VLSI, and ULSI appeared one after another. The integration level of silicon single chips continued to increase, and the requirements for integrated circuit packaging became stricter. With a sharp increase, the power consumption also increases. In order to meet the needs of development, on the basis of the original packaging varieties, a new variety has been added - ball grid array packaging, referred to as BGA. [0003] The memory packaged with BGA technology can increase the memory capacity by two to three times while maintaining the same volume. Compared with TSOP, BGA has smaller volume, better heat dissipation performance and elec...

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Problems solved by technology

[0008] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a placement process for the semiconductor chip packaging process, which is used to solve the problem that the placement process in the prior art takes a long time and easily causes substrate warpage. Thereby increasing process cost, affecting product performance and reducing production yield and other issues

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