Unlock instant, AI-driven research and patent intelligence for your innovation.

Memory erase method and device

A memory and erasing block technology, applied in static memory, read-only memory, information storage, etc., can solve problems such as time-consuming, leakage current, and slow erasing speed

Active Publication Date: 2014-09-17
GIGADEVICE SEMICON (BEIJING) INC
View PDF5 Cites 18 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

First of all, the Erase process will cause Over Erased Cell (over-erased memory cell), as shown by the upper slash, which will cause leakage current; secondly, the OEV repair of Over Erased Cell will consume a lot of time, thereby reducing the overall Erase speed

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Memory erase method and device
  • Memory erase method and device
  • Memory erase method and device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0073] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0074] One of the core concepts of the present invention is that by introducing a cycle of two erasing operations in the erasing process, not only the risk of over-erasing is greatly reduced, but also the time required for over-erasing verification and repair is shortened, thereby extremely The erase reliability and speed of the memory are greatly improved, and the performance of the memory is greatly improved.

[0075] refer to image 3 , which shows a flow chart of the steps of an embodiment of a memory erasing method of the present invention, and the method may specifically include the following steps:

[0076] Step 101, performing a pre-programming operation on the target erase block;

[0077] In the embodiment of the presen...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a memory erase method and a device. The method comprises the following steps: preprogramming operation is carried out on a target erase block; first erase pulse is applied to carry out first erase operation on the target erase block which undergoes preprogramming operation; first excessive erase verification operation is carried out on the target erase block; first erase verification operation is carried out on the target erase block; whether the first erase verification operation is successful is judged; second erase pulse is applied to carry out second erase operation on the target erase block which has undergone the preprogramming operation; second excessive erase verification operation is carried out on the target erase block; second erase verification operation is carried out on the target erase block; whether the second erase verification operation is successful is judged; and third excessive erase verification operation is carried out on the target erase block. According to the invention, excessive erase risks are greatly reduced; a lot of time required by excessive erase restoration is shortened; and erase reliability and speed of a memory are raised.

Description

technical field [0001] The invention relates to the technical field of semiconductor memory, in particular to a memory erasing method and device. Background technique [0002] There are two basic storage units in the memory cell, erase (erasing) cell and program (programming) cell, that is, "1" cell and "0" cell, so there are two types of erasing and programming. Basic operation of memory cells. Among them, the process of changing a "0" cell into a "1" cell is called erasing; otherwise, it is called programming. [0003] refer to figure 1 , shows a flow chart of a traditional memory erasing verification mechanism, the principle of which is as follows: first, perform a Pre_PGM (pre-programming) operation on the target erase block block that needs to be erased, in order to program all the cells as The same "0" cell, even if the cell is in a high threshold state. Then, the first erase pulse (erase pulse) arrives to erase the cells that have undergone Pre_PGM. Followed by t...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/14G11C16/34
Inventor 张现聚丁冲苏志强程莹
Owner GIGADEVICE SEMICON (BEIJING) INC