Receiver circuit, semiconductor integrated circuit, and test method

Abstract

The invention relates to a receiver circuit, a semiconductor integrated circuit, and a test method. A receiver circuit includes a CDR circuit, a jitter generator unit, a test pattern generator unit, and a comparator unit. The jitter generator unit generates jitter having first characteristics (frequency and amplitude). The test pattern generator unit generates a test pattern to which the jitter is added, and supplies the test pattern to the CDR circuit. The comparator unit compares a value outputted from the CDR circuit with an expected value and outputs a comparison result.

Description

technical field [0001] Embodiments discussed herein relate to receiver circuits, semiconductor integrated circuits, and testing methods. Background technique [0002] Clock and Data Recovery (CDR, Clock and Data Recovery) for recovering data and clocks from received signals is employed in high-speed interfaces and the like included in semiconductor devices. [0003] For example, the following two methods are used to test the receiver circuit with CDR function. [0004] One method is as follows: a tester provides a test pattern to a receiver circuit, and a BIST (Built-In Self Test) circuit included in the receiver circuit determines whether the test pattern is properly maintained. [0005] Another method is as follows: place the transmitter circuit that generates and transmits the test pattern in the same chip where the receiver circuit is placed or place the transmitter circuit outside the chip where the receiver circuit is placed (for example, on an evaluation board) . T...

AI Technical Summary

Problems solved by technology

However, in this case, the accuracy of the test deteriorates due to loss, impedance mismatch, measurement error, etc. of the transmission line in the tester or on the evaluation board

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