A kind of manufacturing method of MOS device

Abstract

The invention provides an MOS device manufacturing method. The method includes the following steps that: 1) a first gate oxide layer is formed on the surface of a semiconductor substrate; 2) a silicon oxynitride layer is formed on the surface of the first gate oxide layer; 3) photoresist is formed on the surface of an input and output device area, and the silicon oxynitride layer and the first gate oxide layer at the surface of a core device area are removed; 4) a second gate oxide layer is formed on the surface of the core device area; 5) polysilicon pseudo gates, gate sidewalls, shallowly-doped drains, gate sidewalls, source electrodes and drain electrodes and a dielectric layer of an input and output device and a core device are formed; 6) the polysilicon pseudo gates are removed; and 7) and the second gate oxide layer of the core device is corroded and removed selectively. According to the MOS device manufacturing method, nitrogen is led into the gate oxide layers, and silicon dioxide is removed based on different corrosion rates of silicon dioxide and silicon oxynitride, and therefore, the consumption of the disposable photoresist in manufacturing processes can be decreased, and manufacturing techniques can be simplified, and production cost can be greatly reduced. The MOS device manufacturing method of the invention is simple in the manufacturing techniques and is applicable to industrial production.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a manufacturing method of a MOS device. Background technique [0002] When CMOS enters the 20nm node, in order to avoid high-temperature process, the preparation of high-k dielectric and metal gate is generally carried out on the 20nm process. [0003] With the shrinking of CMOS, the thickness of the gate dielectric layer EOT must be gradually reduced to meet the performance of the device. For the CMOS process of the 20nm node, the thickness of the gate dielectric layer must be reduced to about 1.1nm. In order to achieve this goal, the process of high-k dielectric and metal gate is placed after the formation of source and drain, and the method of preparing gate dielectric layer in industrial production is changed from thermal oxidation to chemical deposition. [0004] The flow of the current 20nm process must use photoresist twice. One is used to define the gate oxide o...

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Problems solved by technology

[0014] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a method for manufacturing a MOS device, which is used to solve the problem of excessive cost due to the excessive number of photoresists used in the manufacturing process of the MOS device in the prior art. question

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