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Active power filter control system with modularized parallel processing and method of the control system

A power filter, parallel processing technology, applied in active power filtering, AC network to reduce harmonics/ripples and other directions, can solve the problems of unsatisfactory harmonic tracking effect, low detection speed, affecting real-time results, etc. Achieve the effect of improving detection speed and current tracking performance, improving filtering characteristics, and facilitating capacity expansion

Active Publication Date: 2014-10-22
NANJING APAITEK TECH
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Problems solved by technology

[0003] The traditional detection logic is to detect phase A, phase B, and phase C separately in order, and then output current in order, which causes calculation delay in the processor operation process, leads to low calculation efficiency, and affects the real-time performance of the results
[0004] The traditional algorithm commonly used in the existing technology takes a lot of time, the detection speed is low, and the overall harmonic tracking effect is not ideal

Method used

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  • Active power filter control system with modularized parallel processing and method of the control system
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  • Active power filter control system with modularized parallel processing and method of the control system

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Embodiment Construction

[0047]Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

[0048] Those skilled in the art can understand that the relevant modules involved in the present invention and the functions realized are carried out on the improved hardware and the device, device or system formed by it, by carrying conventional computer software programs in the prior art or The relevant agreement can be realized, and it is not an improvement on the computer software program or the relevant agreement in the prior art. For example, an improved computer hardware system can still realize specific functions of the hardware syst...

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Abstract

The invention discloses an active power filter control system with modularized parallel processing. The system includes a display, a main control panel, a first slave control panel, a second slave control panel, a third slave control panel, a voltage sensor and a current sensor, the main control panel is connected with the display, the voltage sensor, and the current sensor, and the main control panel is connected with the first slave control panel, the second slave control panel and the third slave control panel. The invention also discloses a control method of the active power filter control system with modularized parallel processing. According to the control method, for industrial occasions, three-phase loads are used, high speed parallel processing capability of an FPGA is utilized to implement three-phase modularized control and perform parallel detection and processing on three-phase harmonic current, thereby shortening a computing period, increasing the number of times of harmonic detection within a certain time, improving detection precision, and satisfying various load requirements.

Description

technical field [0001] The invention discloses a modular parallel processing active power filter control system and a method thereof, specifically relates to a harmonic extraction algorithm, and belongs to the technical field of power system automation products and power quality detection and control thereof. Background technique [0002] Active power filter (APF) is widely concerned as a power electronic device that can dynamically suppress harmonic current. The compensation performance of APF has a lot to do with the control algorithm it adopts. [0003] The traditional detection logic is to detect phase A, phase B, and phase C separately in order, and then output current in order, which causes calculation delay in the process of processor operation, leads to low calculation efficiency, and affects the real-time performance of the results . [0004] The traditional algorithm commonly used in the prior art takes a lot of time, has low detection speed, and the overall harm...

Claims

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Application Information

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IPC IPC(8): H02J3/01
CPCY02E40/20
Inventor 张高玉温小林仇志凌张东芮国强张明李刚杨涛
Owner NANJING APAITEK TECH
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