Mold and method for preparing thyristor chip mesa insulation protective layer using it
A technology of insulating protective layer and thyristor, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of chip blocking voltage reduction, thin insulating protective layer, breakdown, etc., to prevent ultra-high voltage breakdown , increase the creepage distance, the effect of high insulation voltage
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[0020] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.
[0021] Such as Figure 1~2 As shown, a mold includes an upper template 1 and a lower template 2 that are made of clean polytetrafluoroethylene plastics and matched, and the lower template 2 is provided with a chip placement groove 21 that can closely cooperate with the thyristor chip 3; The upper part of the upper template 1 is provided with a glue injection hole 11 for injecting glue; the lower part of the upper template 1 is provided with a groove 22 corresponding to the edge table position of the thyristor chip 3 and connected with the glue injection hole 11, as figure 1 The part indicated by the middle dotted line is the edge mesa part of the thyristor chip 3, and the groove wall on the outside of the groove 22 is in a sinusoidal shape (such as figure 2 shown in B), and the height of the groove wall on the outside of the groove 22 is 5 m...
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