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Method for manufacturing coreless substrates of symmetrical structure

A coreless substrate, symmetrical structure technology, applied in the directions of printed circuit manufacturing, electrical components, printed circuits, etc., can solve the problems of difficult to control the rigidity of coreless substrates, achieve good rigidity and flatness, and is not easy to warp , the effect of low material cost

Active Publication Date: 2014-12-24
NAT CENT FOR ADVANCED PACKAGING
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] Most of the existing substrate technologies are printed circuit patterns on copper-clad laminates or dielectric layers. In this process, printed circuit patterns are formed on copper-clad laminates or dielectric layers. For ultra-thin coreless substrates, if the traditional Due to the difference in circuit patterns and the limitation of material thickness, it is difficult to control the warpage and rigidity of the coreless substrate produced.
[0003] And the traditional substrate manufacturing process can only make one circuit board on one core board

Method used

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  • Method for manufacturing coreless substrates of symmetrical structure
  • Method for manufacturing coreless substrates of symmetrical structure
  • Method for manufacturing coreless substrates of symmetrical structure

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Embodiment Construction

[0031] The present invention will be further described below in conjunction with specific drawings and embodiments.

[0032] The method for preparing a coreless substrate with a symmetrical structure proposed by the present invention specifically includes the following steps:

[0033] Such as figure 1 As shown, in step 1, the front inner layer copper foil 2 and the back inner layer copper foil 3 are laminated on the front and back sides of a central prepreg 1 to form a double-sided copper clad laminate; wherein the front inner layer copper foil 2 has a front inner layer base The copper foil 2a and the front inner layer carrier copper foil 2b; the back inner layer copper foil 3 has the back inner layer base copper foil 3a and the back inner layer carrier copper foil 3b; Copper foil 2a and back inner layer base copper foil 3a;

[0034] In this step, the front inner layer base copper foil 2a and the back inner layer base copper foil 3a are both made of 3um ultra-thin copper foi...

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Abstract

The invention provides a method for manufacturing coreless substrates of a symmetrical structure. Compared with the prior art, the rigidity of the whole coreless substrates is greatly improved, and mechanical stress problems such as warping can be solved better. Two identical coreless substrates are obtained after double-face machining is performed on one core plate and final stripping is performed. Due to the machining technology for the symmetrical structure, the number of machining times is reduced, the machining cost for production can be reduced, the reliability of the coreless substrates can be improved, and the coreless substrates can achieve good electrical performance. The method for manufacturing the coreless substrates of the symmetrical structure mainly includes the steps of the first time of double-face pressing fit, manufacturing of inner layer circuit patterns, the second time of double-face pressing fit, manufacturing of blind holes, manufacturing of outer layer circuit patterns, etching of outer layer base copper foil, separation, single-face etching, resistance welding preventing processing and the like. According to the method, both faces of each integrated substrate are pressed and not prone to warping, and inter layer carrier copper foil on the front side and the back side is kept before separation. Therefore, both the rigidity and the flatness of the substrates are kept good in the manufacturing process, the coreless substrates can be manufactured at a time, and cost is reduced.

Description

technical field [0001] The invention relates to the field of circuit packaging, in particular to a method for preparing a coreless substrate. Background technique [0002] Most of the existing substrate technologies are printed circuit patterns on copper-clad laminates or dielectric layers. In this process, printed circuit patterns are formed on copper-clad laminates or dielectric layers. For ultra-thin coreless substrates, if the traditional Due to the different circuit patterns and the limitation of material thickness, it is difficult to control the warpage and rigidity of the coreless substrate produced. [0003] And the traditional substrate manufacturing process can only make one circuit board on one core board. Contents of the invention [0004] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a method for preparing a coreless substrate with a symmetrical structure, which greatly improves the mechanical stress problem...

Claims

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Application Information

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IPC IPC(8): H05K3/00
Inventor 宋阳
Owner NAT CENT FOR ADVANCED PACKAGING
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