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Segmented digital-to-analog converter having weighted current sources

A technology of analog converters and currents, applied in the field of methods and corresponding control logic, capable of solving problems such as nonlinearity

Active Publication Date: 2015-01-07
ANALOG DEVICES INT UNLTD CO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Any offset error introduced by this buffer will produce non-linear

Method used

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  • Segmented digital-to-analog converter having weighted current sources
  • Segmented digital-to-analog converter having weighted current sources
  • Segmented digital-to-analog converter having weighted current sources

Examples

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specific Embodiment approach

[0063] For purposes of illustration, a specific embodiment of the DAC100 is shown in the Image 6 , where the number of segmentation levels is n=3, and the total resolution is N bits. The decoding logic (see Tables 1-3) and design conditions to adjust the weighting coefficients in the transfer function (see Equations 13 to 15) are discussed below and can be extended to any n>1.

[0064] When n=3, the digital input is divided into three sub-codewords dM, dP and dL with respective lengths M, P and L, where N=M+P+L. Sub-DACs are provided for each sub-word: most significant bit (MSB) sub-DAC, partly significant bit (PSB) sub-DAC and least significant bit (LSB) sub-DAC.

[0065] VLSB = VREFH - VREFL 2 N - - - ( 8 )

[0066] Applying Equation 3, the transfer function ...

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Abstract

A digital input to a digital-to-analog converter (DAC) is divided into a most significant portion and a lesser significant portion. At least one tap voltage generator generates a plurality of voltages, preferably using a resistor string. A decoder decodes at least one sub-word that forms the lesser significant portion to generate a corresponding at least one control signal. A switching unit accesses voltages generated by the at least one tap voltage generator in response to the at least one control signal. A scaled current generator generates a respective weighted current from each accessed voltage. An output stage combines all the weighted currents with a voltage that is an analog representation of the most significant portion of the digital input to generate an analog approximation of the entire digital input.

Description

[0001] Related Application Cross Reference [0002] This application claims the benefit of US Provisional Patent Application No. 61 / 642657, filed May 4, 2012, under 35 USC § 119(e), the entire contents of which are hereby incorporated by reference. Background technique [0003] A form of digital-to-analog converter (DAC) that uses resistor strings, where a set of resistor strings are connected between two voltages to form a voltage divider, where the nodes where the resistors are connected form tap points that can be accessed to produce an output Voltage. The tap point is selected using a switch based on the value of a digital input signal (eg, a digital word). [0004] A basic resistor string DAC has several advantages. It's relatively easy to implement. The linearity of the output is determined by matching the resistor ratios (by choosing the resistors properly, the output of the DAC can vary linearly with the input). Resistor-string DACs also offer a reasonable balance ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/66
CPCH03M1/765H03M1/745H03M1/687H03M1/785
Inventor I·C·梅迪纳桑彻兹-卡斯特罗
Owner ANALOG DEVICES INT UNLTD CO
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