Hybrid memory paging method and device

Abstract

The invention provides a hybrid memory paging method and device. The method includes the steps: 1, a unified memory address is converted into a PCD (page cache disable) or DRAM (dynamic random access memory) memory address; 2, if a currently accessed memory page is in the DRAM, a corresponding flag bit is set according to an access type currently accessed and the fact if the currently accessed memory page and a last visited page is an adjacent page; 3, if the currently accessed memory page is in the PCD, a corresponding flag bit is set according to an access type currently accessed and the fact if the currently accessed memory page and the last visited page is an adjacent page, and whether the currently accessed memory page needs to be moved to the DRAM is determined. With the hybrid memory paging method and device, memory pages needing frequent read operation is placed in the PCM as much as possible, and memory pages needing frequent write operation is placed in the DRAM as much as possible, and thus, writing operation of the PCM is reduced, and service life of the PCM is prolonged.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to a hybrid memory paging method and device. Background technique [0002] With the continuous development of computer technology, the system has higher and higher requirements for memory. Due to the limitations of its own manufacturing process, the commonly used main memory DRAM is difficult to increase the storage capacity per unit area, resulting in a bottleneck in the scalability of the main memory. In addition, the energy consumption of DRAM has increasingly become a problem that cannot be ignored in computer systems. In order to make up for the shortage of DRAM, a new type of storage technology - phase change memory PCM is gradually developed. PCM has the advantages of low energy consumption, high density, non-volatile, etc., and has good scalability. [0003] However, PCM also has the disadvantage of limited unit write times. Therefore, using a hybrid memory of PCM and D...

AI Technical Summary

Problems solved by technology

[0004] The problem in the existing PCM and DRAM hybrid memory paging method is that when scheduling memory pages, the factor considered is the temporal locality of the memory pages. For example, the CLOCK algorithm uses the use bit and dirty bit of the memory page as the scheduling memory page based on

As a result, the efficiency and accuracy of the memory scheduling method are reduced, resulting in a large number of page faults

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