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Detachable and assembleable semiconductor package stack structure and preparation method thereof

A technology of stacking structure and packaging body, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc. Effects of stack height, improved reliability, lower cost

Active Publication Date: 2017-12-01
JCET GROUP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to overcome the above-mentioned shortcomings, provide a detachable and assembleable semiconductor package stack structure and its preparation method, solve the problem of warping caused by the mismatch of thermal expansion coefficients, thereby improving reliability and effectively reducing Stacking height, and a single package is easy to plug and unplug, and different stacked combination packages can be freely assembled according to needs, which is easy to simplify system solutions and reduce costs

Method used

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  • Detachable and assembleable semiconductor package stack structure and preparation method thereof
  • Detachable and assembleable semiconductor package stack structure and preparation method thereof
  • Detachable and assembleable semiconductor package stack structure and preparation method thereof

Examples

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Embodiment Construction

[0030] see figure 2 , the present invention relates to a detachable and assembleable semiconductor package stack structure, including a substrate 20 with via holes 200 , pads 201 and ink 202 on the substrate 20 . The substrate 20 may include one or more layers of organic dielectric material or composite dielectric material or lead frame.

[0031] The pads 201 on the substrate 20 may be interconnected with contacts (not shown) on the upper and lower surfaces of the substrate 20 through conductive elements (not shown) on the substrate 20 .

[0032] The bonding pad 201 may be connected to a contact (not shown) on the substrate 20 connected to the microelectronic element 30 through a conductive element (not shown).

[0033] The pad 201 is arranged outside the through hole 200, when the connector 50 is arranged above the through hole 200, the ink can be added between the pad 201 and the through hole 200 202 , used to prevent solder from blocking the through hole 200 .

[0034] ...

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PUM

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Abstract

The invention relates to a semiconductor packaging body stacking structure capable of being disassembled and assembled and a preparation method of the semiconductor packaging body stacking structure. The semiconductor packaging body stacking structure is characterized by comprising multiple packaging bodies (00) and connector clips (10); each packaging body (00) comprises a substrate (20), wherein the obverse side of the substrate (20) is provided with a through hole (200), a connector (50) is arranged on the through hole (200), and molding compounds (40) are arranged on the obverse side of the substrate (20) and the periphery of the connector (50) in an encapsulating mode; the connector clips (10) are inserted in the corresponding connectors (50) to make the packaging bodies (00) connected together. According to the semiconductor packaging body stacking structure, the connectors are used for replacing a traditional welding mode to achieve alignment related to the surface adhesion technology and solve the problem of warping caused by mismatching between thermal expansion coefficients of components, and therefore the reliability can be improved; the connectors are used as input and output contacts, so that the stacking height is effectively reduced, and the packaging bodies are easy to insert and pull.

Description

technical field [0001] The invention relates to a detachable and assembleable semiconductor package stack structure and a preparation method thereof, belonging to the technical field of electronic packaging. Background technique [0002] Microelectronic devices such as semiconductor chips require many input and output connections to other electronic components. Many semiconductor chips are provided in packages suitable for surface mounting to facilitate handling when the chips are mounted to an external substrate such as a circuit board. The input and output contacts on the chip are connected by thin leads or bumps to contacts on the substrate circuit board. During surface mounting, the package is placed on the board so that each terminal on the package aligns with the corresponding contact pad on the board. Solder or other bonding material is provided between the terminals and the contact pads. The package is permanently bonded in place by applying heat to melt or reflow...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/498H01L21/60
Inventor 曹文静李宗怿刘丽虹孙向南倪洽凯
Owner JCET GROUP CO LTD