A method for thinning bonded wafers

A technology for combining wafers and wafers, which is applied in the thinning field of bonded wafers, can solve problems such as increased production costs and equipment costs, polluted production efficiency, and edge cracking, so as to reduce production costs and equipment costs, improve production efficiency, and avoid sharp corner effect

A technology for combining wafers and wafers, which is applied in the thinning field of bonded wafers, can solve problems such as increased production costs and equipment costs, polluted production efficiency, and edge cracking, so as to reduce production costs and equipment costs, improve production efficiency, and avoid sharp corner effect

CN104733300BActive Publication Date: 2018-09-25SEMICON MFG INT (SHANGHAI) CORP

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  • A method for thinning bonded wafers
  • A method for thinning bonded wafers
  • A method for thinning bonded wafers

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Embodiment Construction

[0041] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0042] see Figure 4 to Figure 5d . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, although only the components related to the present invention are shown in the diagrams rather than the number, shape and Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual implementation, and t...

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Abstract

The invention provides a bonded wafer thinning method. Before a device wafer is thinned, the edge of the wafer is ground first through a grinding wheel to remove the arc-shaped edge. According to the method, the bonded wafer is treated through the grinding wheel before the thinning process starts, and the arc-shaped edge of the device wafer is ground off, so the situation that sharp corners are formed on the bonded wafer in the thinning process is effectively avoided, the phenomenon of edge fractures of the device wafer is eradicated, the wafer can be thinned to less than 50 microns on the premise of guaranteeing that the edge of the device wafer does not fracture so as to meet the requirements of the follow-up preparation technology, and the performance of a semiconductor device manufactured later can be guaranteed. Compared with an existing thinning technology, the method has the advantages that no pollution will happen to a thinning machine platform and the follow-up technology, equipment adopted in the method is simple and easy to operate and concise in process, the production efficiency is greatly improved, and the production cost and equipment cost are lowered.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for thinning bonded wafers. Background technique [0002] As integrated circuits have higher and higher requirements for ultra-thin chips, and in many semiconductor manufacturing fields, such as smart cards (Smart Card), micro-electromechanical systems (MEMS), LED chips, CMOS image sensor chips (CIS), Photovoltaic cells, stacked die, and multi-chip packages are all ultra-thin chips (chip thickness less than 50 μm), but these ultra-thin chips cannot be produced from ultra-thin wafer manufacturing processes. Obtained, but wafers obtained through conventional chip manufacturing processes, are achieved through a thinning process. Therefore, the wafer thinning process occupies an increasingly important position in the integrated circuit manufacturing process. [0003] refer to Figure 1a-1b As shown in , it gives a cross-sectional view of each step in the most common...

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Application Information

Patent Timeline
25 Sep 2018
Publication
CN104733300B
IPC
H01L21/304
Inventors
王娉婷; 奚民伟