Reading operation time control circuit

Abstract

The invention provides a reading operation time control circuit. A virtual device circuit and a virtual sensitivity amplifying circuit are added, the current of a reference device circuit is imaged to the virtual device circuit by a current mirror, and the virtual sensitivity amplifying circuit generates a time control signal according to the current of the virtual device circuit; as the current of the virtual device circuit is the same as the current of the reference device, and also can be changed along with the change of the size of the device, the virtual sensitivity amplifying circuit is ensured to be changed correspondingly along with the change of the size of the device according to the time control signal formed by the current, a disadvantage that the time control signal is fixed after the RC (resistance-capacitance) delay circuit is prepared in the prior art is overcome, the virtual sensitivity amplifying circuit can be changed along with the change of the device size and the PVT (pressure-volume-temperature), and the average reading power consumption is reduced effectively.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a read operation time control circuit. Background technique [0002] When performing a read operation on a flash memory (Flash), a signal generation circuit is usually required to generate a time control signal (Control signal) so as to read data in one read cycle. In the prior art, an RC delay circuit (RC delay circuit) is usually used to generate a time control signal for charging and discharging. [0003] Specifically, please refer to figure 1 , figure 1 It is a schematic diagram of the circuit structure of the sensor amplifier circuit (SA) in the prior art; wherein, the sensor amplifier circuit includes a PMOS transistor (P), an NMOS transistor (N) and two inverters, and the drain of the PMOS transistor The pole is connected to an inverter input, and the output of the inverter is a data output terminal (Dout), and the gate of the PMOS transistor is connected to t...

AI Technical Summary

Problems solved by technology

However, since the R and C of the RC delay circuit are fixed during the preparation, the time control signals Tpre and Twait generated by it cannot be changed, which cannot meet the needs of different devices under test.

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