Heterogeneous multi-core SoC design evaluation system

Abstract

The invention provides a heterogeneous multi-core SoC design evaluation system. The system comprises an assembly abstract modeling module for performing abstract modeling for a master-slave assembly of a bus, a design space definition module for setting each variable and the value range corresponding to each variable according to the SoC design demand, a performance index evaluation module for forming a first SoC structure according to each variable and the value range as well as performing simulation evaluation and comprehensive evaluation of the first SoC structure so as to obtain performance indexes of the SoC, a model training and exploring module for performing model training by the machine learning algorithm according to the performance index and each variable so as to obtain a predication module or a classifying module, and a system structural optimizing module for selecting a second SoC structure through the predication module or the classifying module, wherein the master-slave assembly comprises a coprocessor. With the adoption of the system, the design and evaluation of a heterogeneous multi-core SoC system structure can be assisted to be done.

Description

technical field [0001] The invention relates to computer application technology, in particular to a heterogeneous multi-core SoC design evaluation system. Background technique [0002] With the continuous development of chip manufacturing technology and the increasing demand for multi-functional, high-efficiency, low-energy, and easy-to-carry chips in today's society, chips that blindly pursue high frequency, high capacity, and homogeneous multi-core in the past have encountered bottlenecks. In order to meet the new demands for integrated circuits in the new era, the International Technology Roadmap for Semiconductors (ITRS) proposed a new development goal for the industry - "More than Moore". ITRS believes that the development of integrated circuits should not be limited to "Moore's Law" and blindly pursue increasing the capacity of chips or reducing the volume of chips, but should focus on using different methods to provide consumers with more added value. Development in ...

AI Technical Summary

Problems solved by technology

[0004] The technologies, software and processes involved in the design of heterogeneous multi-core SoC architecture are very complicated

If only relying on the manual series connection by the designer, not only the work efficiency is extremely low, but also it is extremely prone to errors

Images