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Simple and cost-free multi-time programmable structure

A technology of memory cells and polarity types, applied in the direction of electrical components, electric solid devices, circuits, etc., can solve problems such as high junction voltage

Inactive Publication Date: 2018-04-13
GLOBALFOUNDRIES SINGAPORE PTE LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Some existing methods use band-to-band tunneling hot hole (BBHH) for erase operation, but require high junction band voltage and more process steps
Other existing approaches require additional coupled erase gates and coupling capacitors, thus requiring more area

Method used

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  • Simple and cost-free multi-time programmable structure
  • Simple and cost-free multi-time programmable structure
  • Simple and cost-free multi-time programmable structure

Examples

Experimental program
Comparison scheme
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Embodiment 1

[0015] Embodiments generally relate to semiconductor devices. In particular, some embodiments relate to storage devices, such as non-volatile memory (NVM) devices. For example, such storage devices may be incorporated into stand-alone storage devices, such as USB or other types of portable storage units, or ICs, such as microcontrollers or systems on chips (SoCs). For example, the device or IC may be incorporated into or used with consumer electronics or related other types of devices.

[0016] figure 1 A schematic diagram of an embodiment of a memory cell 100 is shown. In one embodiment, the memory cell is a non-volatile (NV) multiple-time programmable (MTP) memory cell 100 . As shown in FIG. 1 , the storage unit 100 includes a first transistor 110 , a second transistor 130 and a control capacitor 150 . In one embodiment, the second transistor serves as a storage element and the control capacitor serves as a voltage coupling element. For example, the first and second tra...

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PUM

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Abstract

The present invention proposes a simple and cost-free multiple-time programmable structure for non-volatile memory cells. The memory unit includes a substrate provided with isolated wells, an HV well region disposed in the substrate, and first and second wells. The memory cell further includes a first transistor with a select gate and a second transistor with a floating gate adjacent to each other and disposed over the second well. The transistor includes first and second diffusion regions disposed adjacent to sides of the gate. A control gate is disposed over the first well and coupled to the floating gate. The control and floating gates include the same gate layer extending across the first and second wells. The control gate includes a capacitor.

Description

technical field [0001] The present invention relates to a non-volatile storage unit and its forming method. Background technique [0002] In recent years, multi-time programmable (MTP) memory has been introduced to be useful in some applications requiring customization in digital and analog designs. These applications include data encryption, reference trimming, manufacturing identification (ID), security ID, and others. However, the incorporation of MTP memory usually comes at the expense of some additional process steps. Some existing methods of fabricating MTP memories tend to suffer from slow access times, small coupling ratios, and / or large cell sizes. Some existing methods use band-to-band tunneling hot hole (BBHH) for erase operation, but require high junction band voltage and more process steps. Other existing methods require additional coupling erase gates and coupling capacitors, thus requiring more area. [0003] Therefore, there is a need for a simple and cos...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11521H01L27/11524H10B41/30H10B41/35H10B69/00
Inventor D·P-C·岑傅仰伟U·辛格孙远M·A·貌貌
Owner GLOBALFOUNDRIES SINGAPORE PTE LTD