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A kind of semiconductor device and its preparation method

A semiconductor and device technology, applied in the field of semiconductor devices and their preparation, can solve the problems of high bonding stress, cracking, poor bonding quality, etc.

Active Publication Date: 2019-01-18
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The characteristic of the method is that the bonding stress (bonding force) is very large during the bonding process. When Cu protrudes (protrusion), the copper pad (Cu PAD) will be squeezed and deformed under the huge bonding stress (bonding force). It is possible to cause metal bridge, which will lead to the diffusion of metal copper (Cu diffuse) due to the contact between Cu and oxide (Oxide). In severe cases, it may cause cracking (crack) due to high pressure, such as Figure 1b and 1c shown
[0006] Usually, the medium used to block the oxide diffuse of Cu in the Cu process is SiN, but adding a SiN protective layer on the wafer surface will result in poor bonding quality.
[0007] Therefore, although there is a method of Cu-Cu bonding at the wafer level (Wafer level Cu-Cubonding) in the prior art, there are various disadvantages in the prior art, such as bonding alignment (bonding alignment), bonding quality problems (Bonding quality issue), wafer stress causes wafer edge bonding failure (wafer stressinduce wafer edge bonding fail) and copper diffusion (Cu diffuse issue), the above drawbacks have become urgent problems to be solved to further improve device performance and yield

Method used

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  • A kind of semiconductor device and its preparation method
  • A kind of semiconductor device and its preparation method
  • A kind of semiconductor device and its preparation method

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Embodiment 1

[0061] In order to solve the problems in the prior art, the present invention provides a new semiconductor device, the following in conjunction with the attached Figures 2a-2b The semiconductor device of the present invention will be further described.

[0062] First, the semiconductor device of the present invention includes a first bonded wafer 20 (top bonded wafer) and a second bonded wafer 21 (bottom bonded wafer), wherein the first bonded wafer 20 and the second bonded wafer Each of the circles 21 includes bonding pads, and the bonding pads in the two bonded wafers are bonded together to realize the packaging of the semiconductor device.

[0063] Among them, such as Figure 2a As shown, in this embodiment, the bonding pads in the first bonding wafer 20 are in the shape of protrusions, and the bonding pads in the second bonding wafer 21 are in the shape of grooves, wherein the protrusions The shape matches the size of the groove shape.

[0064] Specifically, wherein, i...

Embodiment 2

[0075] Attached below Figures 3a-3k The method for manufacturing the semiconductor device in a specific embodiment of the present invention will be further described.

[0076] Wherein, the semiconductor device includes a first bonded wafer 30 and a second bonded wafer 31, the preparation method and bonding method of the first bonded wafer 30 and the second bonded wafer 31 will be further described below instruction of.

[0077] First refer to Figures 3a-3d The method for preparing the first bonded wafer will be described in detail.

[0078] First, step 301 is performed to provide a substrate 301 on which a first interlayer dielectric layer is formed, and an interconnection structure is formed in the first interlayer dielectric layer.

[0079] Specifically, such as Figure 3a As shown, the base 301 includes at least a semiconductor substrate, and the semiconductor substrate can be selected from commonly used materials in the field, and other components are further formed ...

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Abstract

The invention relates to a semiconductor device and a preparation method thereof. The semiconductor device comprises a first joint wafer and a second joint wafer, a bonding pad in the first joint wafer is of a projection shape, a bonding pad in the second joint wafer is of a groove shape, and the shape and size of the projection match those of the groove respectively. The new joint wafer is provided to solve the problems in the prior art, the size of the bonding pads is adjusted and the joint appearance of a Cu pad is adjusted to improve the bonding yield rate and reliability.

Description

technical field [0001] The present invention relates to the field of semiconductors, and in particular, the present invention relates to a semiconductor device and a preparation method thereof. Background technique [0002] In the field of electronic consumption, multi-functional devices are more and more popular among consumers. Compared with devices with simple functions, the production process of multi-functional devices will be more complicated. For example, multiple chips with different functions need to be integrated on the circuit board. With the introduction of 3D integrated circuit (IC) technology, 3D integrated circuit (IC) is defined as a system-level integrated structure that stacks multiple chips in a vertical plane direction to save space, and the edge parts of each chip Multiple pins can be drawn as needed, and these pins can be used as needed to interconnect the chips that need to be connected to each other through metal wires, but the above method still has ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/538H01L21/768
Inventor 李新戚德奎包德君
Owner SEMICON MFG INT (SHANGHAI) CORP