Pipeline successive-approximation analog-to-digital converter

Abstract

The invention discloses a pipeline successive-approximation analog-to-digital converter used for solving the technical problem that the existing pipeline successive-approximation analog-to-digital converter is high in power consumption. The technical scheme is as follows: a first stage circuit adopts a 6-bit half-gain MDAC (Multiplying Digital To Analog Converter) circuit, and a second stage circuit adopts an 8-bit full-reference voltage multiple-segment capacitor SAR ADC (successive-approximation analog-to-digital converter). The whole capacitor network of the 8-bit full-reference voltage multiple-segment capacitor SAR ADC is divided into a high 4-bit binary weighted capacitor network and a low 4-bit binary weighted capacitor network. Since a sampling capacitance of the 8-bit full-reference voltage multiple-segment capacitor SAR ADC is significantly reduced, thus a load capacitance of a residue amplifier in the 6-bit half-gain MDAC circuit is significantly reduced. For the same error requirement, current consumed by the residue amplifier in the 6-bit half-gain MDAC circuit can be reduced, so that the power consumption of the pipeline successive-approximation analog-to-digital converter can be reduced.

Description

technical field [0001] The invention relates to an analog-to-digital converter, in particular to a pipeline successive approximation analog-to-digital converter. Background technique [0002] In order to adapt to the rapid development of computer, communication and multimedia technology and the continuous acceleration of digitalization in the high-tech field, ADC has undergone great changes in process, structure and performance, and is moving towards low power consumption, high speed and high resolution. direction of development. Pipelined successive approximation analog-to-digital converters combine the advantages of both traditional pipelined analog-to-digital converters and traditional successive approximation analog-to-digital converters. [0003] refer to Figure 1-2 . The document "ChunC.Lee, ASAR-AssistedTwo-StagePipelineADC, IEEEJournalOfSolid-StateCircuits, 2011, VOL.46, NO.4, pp.859-869" discloses a 12-bit50MS / s pipeline successive approximation analog-to-digital...

AI Technical Summary

Problems solved by technology

[0011] In order to overcome the shortage of large power consumption of the existing pipeline successive approximation analog-to-digital converter, the present invention provides a pipeline successive approximation analog-to-digital converter

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