The invention discloses a high speed quick flashing plus alternating comparison type successive approximation analog to digital converter which comprises a first sampling circuit, a second sampling circuit, a first capacitance array, a second capacitance array, a 4 bit quick flashing type sub-ADC, an alternate comparator, a logic control circuit and a digital weighted circuit, wherein both the first capacitance array and the second capacitance array comprise a thermometer code high effective bit capacitance array and a sub-binary low effective bit capacitance array. By the adoption of the high speed quick flashing plus alternating comparison type successive approximation analog to digital converter, through adding the quick flashing type sub-ADC before a cycle parsing process, cycle times can be effectively reduced and parsing time is shortened; through the introduction of the alternate comparator, the comparator reset time in a traditional structure is eliminated, the speed bottleneck is broken through and parsing speed is accelerated; the added quick flashing type sub-ADC bit number is low, and interpolation technology and a dynamic circuit structure are adopted, so that the increased power consumption is small, and the achieving cost is low cost is achieved; moreover, the introduced alternate comparator does not increase the total comparison times, so that power consumption does not increase.