Memory with local-/global bit line architecture and additional capacitance for global bit line discharge in reading

Abstract

There is provided a memory unit comprising one or more global bit lines connected to a sense amplifier, and a plurality of memory cells that are grouped into a plurality of memory cell groups, each memory cell group having one or more local bit lines operatively connected to each of the memory cells in the memory cell group. Each memory cell group is configured such that, when a memory cell of the memory cell group is being read, the one or more local bit lines of the memory cell group are provided as inputs to a logic circuit and are not connected to the global bit lines, the logic circuit being configured to cause a capacitance element to be connected to one of the one or more global bit lines in dependence upon the states of the one or more local bit lines of the memory cell group.

Description

technical field [0001] The present invention relates to memory devices providing digital data storage. In particular, the present invention provides apparatus and methods for reducing the overall operating power of a memory device having a hierarchical bit line arrangement. Background technique [0002] Data storage is a basic need of almost all modern digital electronic systems. Static read / write memory (SRAM) comprises a major portion of this functionality and is relatively easy to integrate into semiconductor devices along with large amounts of logic, providing fast access and low power. With the advent of deep submicron (DSM) geometry silicon processing, the task of achieving reliable storage while maintaining low power consumption has become increasingly difficult; The proliferation of electronic devices has increased. [0003] A common memory cell design is the figure 1 A 6-transistor circuit is shown, and includes a storage element consisting of two back-to-back i...

AI Technical Summary

Problems solved by technology

In the case of a single bitline connected to all memory cells in a column, the total capacitance can become large, and each local bitline sees only part of this load

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