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Repair circuit and method of pmos transistor

A technology for repairing circuits and transistors, which is applied to improve the reliability of transistors and field effect transistors, logic circuits, etc. It can solve the problems affecting the life of PMOS transistors, and achieve the effect of improving NBTI effect and prolonging life

Active Publication Date: 2017-12-01
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] With the reduction of semiconductor size, the NBTI effect of PMOS transistors is becoming more and more obvious, which seriously affects the life of PMOS transistors

Method used

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  • Repair circuit and method of pmos transistor
  • Repair circuit and method of pmos transistor
  • Repair circuit and method of pmos transistor

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Embodiment Construction

[0035] As described in the background, since the channel region of the PMOS transistor needs to be applied with a negative bias gate voltage, the negative bias gate voltage will cause the NBTI effect of the PMOS transistor and affect the life of the PMOS transistor. The invention provides a repair circuit and method for a PMOS transistor, which improves the NBTI effect of the PMOS transistor by applying a bias voltage of a negative voltage value to the substrate of the PMOS transistor when the PMOS transistor is in an off state.

[0036] Figure 4 It is a PMOS transistor and a repair circuit thereof according to an embodiment of the present invention. As the PMOS transistor P40 to be repaired, the PMOS transistor P40 may be a test transistor for reliability testing, or an application transistor in a functional chip. The gate of the PMOS transistor P40 is suitable for receiving the driving signal Vg, the source of the PMOS transistor P40 is suitable for receiving the power sup...

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PUM

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Abstract

The present disclosure provides integrated circuit (IC) devices and repair methods of the IC devices. An IC device includes a PMOS transistor including a substrate, a gate dielectric layer on the substrate, and a gate on the gate dielectric layer. The IC device also includes a repair circuit configured to apply a negative bias voltage to the substrate of the PMOS transistor, when the PMOS transistor is in an OFF state, to cause injections of electrons in the substrate into the gate dielectric layer to neutralize holes caused by negative bias temperature instability (NBTI) effect. The repair circuit is further configured to stop applying the negative bias voltage to the substrate of the PMOS transistor when the PMOS transistor is in an ON state. As such, the disclosed IC device repairs defect caused by NBTI effect in the PMOS transistor and prolongs the lifespan of the PMOS transistor.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a repair circuit and method for a PMOS transistor. Background technique [0002] As the integration level of integrated circuits is becoming higher and higher, the reliability requirements of transistors are also increasing. In a CMOS process, when evaluating the reliability of a PMOS transistor, negative bias temperature instability (NBTI, Negative Bias Temperature Instability) is a main evaluation factor. NBTI means that under the action of negative bias gate voltage and high temperature of PMOS transistor, the hydrogen-silicon bond at the interface between the gate oxide layer of the PMOS transistor and the substrate is broken, forming interface defect charges, resulting in the threshold voltage of the PMOS transistor The phenomenon of drifting with the saturation current. [0003] figure 1 is a schematic diagram of the circuit structure of the NBTI for testing PMOS ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05F1/56
CPCH01L27/092H03K19/00315H03K19/00384
Inventor 甘正浩
Owner SEMICON MFG INT (SHANGHAI) CORP
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