Method of reducing wafer epitaxy process defect
An epitaxial process, wafer technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as waste, loss of normal working time of machines, affecting product yield, etc., to improve defect performance and improve product quality. rate effect
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[0024] The present invention will be further described below in conjunction with specific embodiment and accompanying drawing, set forth more details in the following description so as to fully understand the present invention, but the present invention can obviously be implemented in many other ways different from this description, Those skilled in the art can make similar promotions and deductions based on actual application situations without violating the connotation of the present invention, so the content of this specific embodiment should not limit the protection scope of the present invention.
[0025] figure 2 It is a flowchart of a method for a wafer epitaxy process capable of reducing defects according to an embodiment of the present invention. Such as figure 2 As shown, the method flow includes the following actions:
[0026] Step S201 is executed, using hydrogen chloride (HCL) gas to clean the residual covering layer in a reaction chamber of the epitaxial proc...
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