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A U-shaped finfet NOR gate structure and its manufacturing method

A manufacturing method and NOT gate technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., to achieve the effects of improving device performance, improving short channel effects, low subthreshold slope and leakage current

Active Publication Date: 2018-10-02
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The invention provides a U-shaped FinFET NOR gate device structure and its manufacturing method. A new device structure is proposed on the basis of the existing FinFET process, so that the gate length of the device is not limited by the footprint size, effectively solving the problem of The problems caused by the short channel effect

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  • A U-shaped finfet NOR gate structure and its manufacturing method
  • A U-shaped finfet NOR gate structure and its manufacturing method
  • A U-shaped finfet NOR gate structure and its manufacturing method

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Embodiment Construction

[0033] In order to make the object, technical solution and advantages of the present invention clearer, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0034] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

[0035] The present invention provides a U-shaped FinFET NOR gate device structure, comprising: a substrate 100;

[0036] a bit line 150, the bit line is located in the top region of the substrate 100 and is formed by a carrier doped region;

[0037] The first fin 210, the first fin is located above the substrate 10...

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Abstract

A U-shaped FinFET or non-gate structure and manufacturing method thereof, comprising: a substrate; a bit line located at a top region of the substrate and formed by a charge carrier doped region; a first fin located above the substrate, a lower half portion thereof being enclosed by a first word line to form a first channel region; a second fin located above the substrate, a lower half portion thereof being enclosed by a second word line to form a second channel region; a third fin located above the substrate, a lower half portion thereof being enclosed by a third word line to form a third channel region; and an isolation region filling regions between the first word line, the second word line and the third word line to enable the word lines to be mutually separated; and regions at the top portions of the first fin, the second fin and the third fin not covered by the first word line, the second word line and the third word line respectively have source and drain regions of the same type as the bit line. The U-shaped FinFET or non-gate device structure enables the gate length of a device to be free of footprint size limit, thus effectively solving a problem caused by a short channel effect.

Description

technical field [0001] The present invention relates to a method for manufacturing a semiconductor device, in particular to a method for manufacturing a FinFET. technical background [0002] Moore's Law states that the number of transistors that can be accommodated on an integrated circuit doubles every 18 months, and the performance also doubles at the same time. At present, with the development of integrated circuit technology and technology, devices such as diodes, MOSFETs, and FinFETs have appeared successively, and the size of nodes has been continuously reduced. However, since 2011, silicon transistors have approached the atomic level and reached the physical limit. Due to the natural properties of this material, in addition to the short-channel effect, the quantum effect of the device also has a great impact on the performance of the device. The speed and performance of silicon transistors are hard to break through. Therefore, how to greatly improve the performance ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/088H01L29/78H01L21/8234
CPCH01L29/78
Inventor 尹海洲刘云飞李睿
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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