Deep learning oriented sparse self-adaptive neural network, algorithm and implementation device
A neural network algorithm and deep learning technology, applied in biological neural network models, physical implementation, etc., can solve problems such as loss of accuracy, and achieve the effect of saving storage requirements
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[0037] Example one
[0038] Generally, a traditional artificial neural network includes a visible layer with a certain number of input nodes and a hidden layer with a certain number of output nodes. In some designs, the label layer is used in the highest layer of the network, which is also an optional component of the present invention, but it is not an essential component. Each node of a hidden layer is connected to the input node of the visible layer by weighting. Note that when the hidden layer is two or more layers, the previous hidden layer is connected to another hidden layer. Once the hidden layer of the low-level network is trained, for the high-level network, the hidden layer is the visible layer of the high-level network.
[0039] figure 1 It is a schematic diagram of the classic DBN model. In the DBN network, the parameters describing the connection are dense real numbers. The calculation of each layer is the matrix multiplication between the interconnected units and ...
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[0076] Example two
[0077] Early sparse DBN research only focused on extracting sparse features instead of using sparse connections to generate efficient network architectures for hardware models; recent neuromorphic hardware models used for deep learning have an increasing number of neurons on chip, but they are integrated on a chip One million neurons and one billion synapses are still no small challenge. Figure 4 A device for optimizing and implementing a sparse adaptive neural network for deep learning is shown, and its MAP table and TABLE table are obtained by the DAN sparse algorithm of the present invention.
[0078] The specific workflow is as follows:
[0079] 1) Check whether the input bit axon[i] is 1: If it is 1, that is, there is a synaptic event, and the corresponding position in the MAP list is accessed according to the value of i. If it is 0, the next input bit is detected.
[0080] 2) Read the corresponding start address and length value in the MAP. If the length va...
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