Storage device with power-off protection function, power-off protection method and computing system

A technology for storage devices and computing systems, applied in the field of computing systems, can solve problems such as corrupted data, bad data, and damage to the entire file system of data, and achieve the effect of ensuring integrity

Inactive Publication Date: 2016-06-01
SHANGHAI CIYU INFORMATION TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the introduction of the write cache creates a new problem: once a power failure occurs, the content in the DRAM cache that has not been written to the NAND will be lost, causing the system to lose data or even damage the entire file system
[0013] However, in the absence of backup pow

Method used

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  • Storage device with power-off protection function, power-off protection method and computing system
  • Storage device with power-off protection function, power-off protection method and computing system
  • Storage device with power-off protection function, power-off protection method and computing system

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Embodiment Construction

[0061] The storage device of an embodiment of the present invention includes a host interface, a main control chip, MRAM and one or more NAND chips, and the MRAM can be used as an independent chip, such as figure 2 As shown, it can also be integrated into the main control chip.

[0062] The storage device in this embodiment is a solid state disk.

[0063] The main control chip includes a CPU;

[0064] MRAMs include:

[0065] The write cache or the read-write cache is organized according to pages of the same size as the NAND pages in the NAND chip, and the data written to the storage device is first written into the write cache or the read-write cache, and then written back into the NAND chip;

[0066] The cache page table is used to store the physical address of the NAND page corresponding to the cache page;

[0067] MRAM also includes a write-back cache page table, which is used to record the cache pages that are about to be written back to the NAND chip. If the cache pag...

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Abstract

The invention provides a storage device and a power-off protection method therefor. The storage device comprises a host interface, a main control chip, an MRAM (Magnetic Random Access Memory) and one or more NAND chips, wherein the MRAM comprises a write cache or a read-write cache and a cache page table. The MRAM further comprises a write-back cache page table used for recording cache pages about to be written back to the NAND chips; if the operation of writing back the cache pages to the NAND chips is finished, a corresponding record of the write-back cache page table is deleted; and if the power is off in the process of writing back the cache pages to the NAND chips, the cache pages are rewritten back to the NAND chips when the power is on. According to the storage device and the power-off protection method provided by the invention, the cache pages about to be written back to the NAND chips are recorded in the MRAM, and if the power is off in the process of writing back the cache pages to the NAND chips, the cache pages are rewritten back to the NAND chips when the power is on, so that the data completeness can be ensured; and blocks about to be erased are further recorded in the MRAM, and if the power is off in the erasure process, the blocks are re-erased when the power is on, so that the data completeness is further ensured. The invention furthermore provides a computing system with a power-off protection function.

Description

technical field [0001] The invention relates to a storage device, in particular to a storage device with a power-off protection function, a power-off protection method and a computing system. Background technique [0002] Regarding Solid State Drives (SSD) and NAND: [0003] Currently, the development of NAND flash memory technology has promoted the SSD industry. Such as figure 1 As shown, high-speed serial interfaces such as SATA, PICe and other technologies are used between the SSD and the host. The interior consists of a set of NAND chips used to store data, DDR DRAM (memory) used to support calculations and cache data, and a main control chip (SSD Controller). Sometimes a power failure protection system is also required. [0004] Memory cards (SD or MicroSD cards, eMMC) used in devices such as mobile phones have a similar structure. It just replaces the DRAM chipset with a small amount of SRAM integrated in the control chip. [0005] NAND is a storage device that r...

Claims

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Application Information

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IPC IPC(8): G06F12/16
Inventor 戴瑾
Owner SHANGHAI CIYU INFORMATION TECH
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