Automatic testing method for FPGA local interconnection resources on basis of repeatable configuration units

Abstract

The invention belongs to the technical field of integrated circuits, and particularly relates to an automatic testing method for FPGA local interconnection resources on the basis of repeatable configuration units. The method comprises the step of testing on all local interconnection line segments and all local programmable interconnection switches in an FPGA chip. According to the method, the regularity of an FPGA is fully utilized,the FPGA is subjected to local interconnection and configured to repeatable configuration unit templates with adjacent logic circuit resources, and then the unit templates are sequentially connected end to end and repeatedly traversed to the whole FPGA. Faults capable of being tested through the method comprise open circuits of the interconnection line segments, the short-circuit fault and the normally-opened and normally-closed faults of the interconnection switches. The method can complete testing on all the local interconnection resources in the FPGA chip and has higher applicability on FPGAs with different structures and scales. The configuration number, the configuration difficulty and the testing time needed by testing are all greatly optimized.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a traversal test method for local interconnection resources in an FPGA (Field Programmable Gate Array). Background technique [0002] Field Programmable Gate Array (Field Programmable Gate Array, FPGA), as a programmable logic device, not only solves the problems of long ASIC design cycle, high manufacturing cost and complex production process, but also avoids the original programmable logic device gate circuit Disadvantages of limited quantity and low working frequency. FPGA can be programmed through the hardware description language, the user uses the hardware description language to design the circuit, and then performs layout and wiring through the corresponding FPGA supporting software, generates a bit stream file and downloads it to the FPGA chip, so that the FPGA chip can be quickly configured to the user's needs circuit. [0003] Interconnect res...

AI Technical Summary

Problems solved by technology

However, with the increasing scale of FPGA, local interconnect resources usually contain millions of interconnect segments and switches, resulting in a sharp increase in the complexity of the method

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