Method and device for chip to adaptively regulate reading time sequence path
A self-adaptive adjustment and chip technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problem of long data path and delay at the initiator of the SRAM return command, and achieve the effect of increasing the maximum operating frequency and shortening the timing path
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0015] The method for self-adaptively adjusting the reading timing path of the chip of the present invention comprises the following steps:
[0016] After the chip initialization is completed, it starts to work and generates a working clock;
[0017] Judging the working clock frequency according to the low-frequency clock input by the chip and the working clock;
[0018] The read control unit memory outputs a read command to the memory unit to perform a read operation, and at the same time sets the valid indicator bit of the original read data to be valid after one cycle of the read command;
[0019] According to the received read command and the working clock, the memory unit outputs the original read data after the read command is sampled by the working clock, and after the delay time of the read action inherent in the circuit;
[0020] The original read data is respectively delayed by one cycle by one stage and two cycles by two stages to obtain read data delayed by one cy...
PUM
Abstract
Description
Claims
Application Information
- R&D Engineer
- R&D Manager
- IP Professional
- Industry Leading Data Capabilities
- Powerful AI technology
- Patent DNA Extraction
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com